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authorSteve Markgraf <steve@steve-m.de>2012-10-03 17:19:29 +0200
committerSteve Markgraf <steve@steve-m.de>2012-10-03 17:19:29 +0200
commit18687916d675c52bba236bb9d3a8f9448bd12506 (patch)
tree4da6c9eba32e5e6c7a6c5a79412355863226d354
parentb4e48d955554e0d92f2e9448b1acc7c0babb107a (diff)
tuner_fc001x: fix tuning for frequencies < 45 MHz
This allows tuning to 27 MHz for example (civil band). Best results are achieved when setting the gain to very low values. Signed-off-by: Steve Markgraf <steve@steve-m.de>
-rw-r--r--src/tuner_fc0012.c50
-rw-r--r--src/tuner_fc0013.c50
2 files changed, 44 insertions, 56 deletions
diff --git a/src/tuner_fc0012.c b/src/tuner_fc0012.c
index 4ad2045..768cf1c 100644
--- a/src/tuner_fc0012.c
+++ b/src/tuner_fc0012.c
@@ -206,37 +206,31 @@ int fc0012_set_params(void *dev, uint32_t freq, uint32_t bandwidth)
vco_select = 1;
}
- if (freq >= 45000000) {
- /* From divided value (XDIV) determined the FA and FP value */
- xdiv = (uint16_t)(f_vco / xtal_freq_div_2);
- if ((f_vco - xdiv * xtal_freq_div_2) >= (xtal_freq_div_2 / 2))
- xdiv++;
-
- pm = (uint8_t)(xdiv / 8);
- am = (uint8_t)(xdiv - (8 * pm));
-
- if (am < 2) {
- am += 8;
- pm--;
- }
+ /* From divided value (XDIV) determined the FA and FP value */
+ xdiv = (uint16_t)(f_vco / xtal_freq_div_2);
+ if ((f_vco - xdiv * xtal_freq_div_2) >= (xtal_freq_div_2 / 2))
+ xdiv++;
- if (pm > 31) {
- reg[1] = am + (8 * (pm - 31));
- reg[2] = 31;
- } else {
- reg[1] = am;
- reg[2] = pm;
- }
+ pm = (uint8_t)(xdiv / 8);
+ am = (uint8_t)(xdiv - (8 * pm));
- if (reg[1] > 15) {
- fprintf(stderr, "[FC0012] no valid PLL combination "
- "found for %u Hz!\n", freq);
- return -1;
- }
+ if (am < 2) {
+ am += 8;
+ pm--;
+ }
+
+ if (pm > 31) {
+ reg[1] = am + (8 * (pm - 31));
+ reg[2] = 31;
} else {
- /* fix for frequency less than 45 MHz */
- reg[1] = 0x06;
- reg[2] = 0x11;
+ reg[1] = am;
+ reg[2] = pm;
+ }
+
+ if ((reg[1] > 15) || (reg[2] < 0x0b)) {
+ fprintf(stderr, "[FC0012] no valid PLL combination "
+ "found for %u Hz!\n", freq);
+ return -1;
}
/* fix clock out */
diff --git a/src/tuner_fc0013.c b/src/tuner_fc0013.c
index 99f2e4b..7ce816c 100644
--- a/src/tuner_fc0013.c
+++ b/src/tuner_fc0013.c
@@ -311,37 +311,31 @@ int fc0013_set_params(void *dev, uint32_t freq, uint32_t bandwidth)
vco_select = 1;
}
- if (freq >= 45000000) {
- /* From divided value (XDIV) determined the FA and FP value */
- xdiv = (uint16_t)(f_vco / xtal_freq_div_2);
- if ((f_vco - xdiv * xtal_freq_div_2) >= (xtal_freq_div_2 / 2))
- xdiv++;
-
- pm = (uint8_t)(xdiv / 8);
- am = (uint8_t)(xdiv - (8 * pm));
-
- if (am < 2) {
- am += 8;
- pm--;
- }
+ /* From divided value (XDIV) determined the FA and FP value */
+ xdiv = (uint16_t)(f_vco / xtal_freq_div_2);
+ if ((f_vco - xdiv * xtal_freq_div_2) >= (xtal_freq_div_2 / 2))
+ xdiv++;
- if (pm > 31) {
- reg[1] = am + (8 * (pm - 31));
- reg[2] = 31;
- } else {
- reg[1] = am;
- reg[2] = pm;
- }
+ pm = (uint8_t)(xdiv / 8);
+ am = (uint8_t)(xdiv - (8 * pm));
- if (reg[1] > 15) {
- fprintf(stderr, "[FC0013] no valid PLL combination "
- "found for %u Hz!\n", freq);
- return -1;
- }
+ if (am < 2) {
+ am += 8;
+ pm--;
+ }
+
+ if (pm > 31) {
+ reg[1] = am + (8 * (pm - 31));
+ reg[2] = 31;
} else {
- /* fix for frequency less than 45 MHz */
- reg[1] = 0x06;
- reg[2] = 0x11;
+ reg[1] = am;
+ reg[2] = pm;
+ }
+
+ if ((reg[1] > 15) || (reg[2] < 0x0b)) {
+ fprintf(stderr, "[FC0013] no valid PLL combination "
+ "found for %u Hz!\n", freq);
+ return -1;
}
/* fix clock out */