forked from cellular-infrastructure/osmo-pcu
encoding: Refactor write_immediate_assignment
Move the IA rest encoding into separate functions fpr uplink and downlink. Sponsored-by: On-Waves ehf
This commit is contained in:
parent
7505f1d636
commit
18831c3ca9
177
src/encoding.cpp
177
src/encoding.cpp
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@ -28,7 +28,98 @@
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#include <errno.h>
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#include <errno.h>
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#include <string.h>
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#include <string.h>
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// GSM 04.08 9.1.18 Immediate assignment
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static void write_ia_rest_downlink(
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bitvec * dest, unsigned& wp,
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uint8_t tfi, uint32_t tlli, uint8_t polling,
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uint32_t fn, uint8_t alpha, uint8_t gamma, int8_t ta_idx)
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{
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// GSM 04.08 10.5.2.16 IA Rest Octets
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bitvec_write_field_lh(dest, wp, 3, 2); // "HH"
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bitvec_write_field(dest, wp, 1, 2); // "01" Packet Downlink Assignment
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bitvec_write_field(dest, wp,tlli,32); // TLLI
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bitvec_write_field(dest, wp,0x1,1); // switch TFI : on
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bitvec_write_field(dest, wp,tfi,5); // TFI
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bitvec_write_field(dest, wp,0x0,1); // RLC acknowledged mode
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA
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} else {
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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}
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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bitvec_write_field(dest, wp,polling,1); // Polling Bit
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bitvec_write_field(dest, wp,!polling,1); // TA_VALID ???
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if (ta_idx < 0) {
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bitvec_write_field(dest, wp,0x0,1); // switch TIMING_ADVANCE_INDEX = off
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} else {
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bitvec_write_field(dest, wp,0x1,1); // switch TIMING_ADVANCE_INDEX = on
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bitvec_write_field(dest, wp,ta_idx,4); // TIMING_ADVANCE_INDEX
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}
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if (polling) {
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bitvec_write_field(dest, wp,0x1,1); // TBF Starting TIME present
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bitvec_write_field(dest, wp,(fn / (26 * 51)) % 32,5); // T1'
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bitvec_write_field(dest, wp,fn % 51,6); // T3
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bitvec_write_field(dest, wp,fn % 26,5); // T2
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} else {
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bitvec_write_field(dest, wp,0x0,1); // TBF Starting TIME present
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}
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bitvec_write_field(dest, wp,0x0,1); // P0 not present
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// bitvec_write_field(dest, wp,0x1,1); // P0 not present
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// bitvec_write_field(dest, wp,0xb,4);
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}
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static void write_ia_rest_uplink(
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struct gprs_rlcmac_bts *bts, bitvec * dest, unsigned& wp,
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uint8_t tfi, uint8_t usf, uint32_t fn, uint8_t single_block,
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uint8_t alpha, uint8_t gamma, int8_t ta_idx)
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{
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// GMS 04.08 10.5.2.37b 10.5.2.16
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bitvec_write_field_lh(dest, wp, 3, 2); // "HH"
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bitvec_write_field(dest, wp, 0, 2); // "0" Packet Uplink Assignment
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if (single_block) {
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bitvec_write_field(dest, wp, 0, 1); // Block Allocation : Single Block Allocation
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA = present
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} else
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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if (ta_idx < 0) {
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bitvec_write_field(dest, wp,0x0,1); // switch TIMING_ADVANCE_INDEX = off
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} else {
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bitvec_write_field(dest, wp,0x1,1); // switch TIMING_ADVANCE_INDEX = on
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bitvec_write_field(dest, wp,ta_idx,4); // TIMING_ADVANCE_INDEX
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}
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bitvec_write_field(dest, wp, 1, 1); // TBF_STARTING_TIME_FLAG
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bitvec_write_field(dest, wp,(fn / (26 * 51)) % 32,5); // T1'
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bitvec_write_field(dest, wp,fn % 51,6); // T3
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bitvec_write_field(dest, wp,fn % 26,5); // T2
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} else {
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bitvec_write_field(dest, wp, 1, 1); // Block Allocation : Not Single Block Allocation
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bitvec_write_field(dest, wp, tfi, 5); // TFI_ASSIGNMENT Temporary Flow Identity
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bitvec_write_field(dest, wp, 0, 1); // POLLING
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bitvec_write_field(dest, wp, 0, 1); // ALLOCATION_TYPE: dynamic
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bitvec_write_field(dest, wp, usf, 3); // USF
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bitvec_write_field(dest, wp, 0, 1); // USF_GRANULARITY
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bitvec_write_field(dest, wp, 0, 1); // "0" power control: Not Present
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bitvec_write_field(dest, wp, bts->initial_cs_ul-1, 2); // CHANNEL_CODING_COMMAND
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bitvec_write_field(dest, wp, 1, 1); // TLLI_BLOCK_CHANNEL_CODING
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA
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} else
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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/* note: there is no choise for TAI and no starting time */
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bitvec_write_field(dest, wp, 0, 1); // switch TIMING_ADVANCE_INDEX = off
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bitvec_write_field(dest, wp, 0, 1); // TBF_STARTING_TIME_FLAG
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}
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}
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/*
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* Immediate assignment, sent on the CCCH/AGCH
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* see GSM 04.08, 9.1.18 and GSM 44.018, 9.1.18 + 10.5.2.16
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*/
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int Encoding::write_immediate_assignment(
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int Encoding::write_immediate_assignment(
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struct gprs_rlcmac_bts *bts,
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struct gprs_rlcmac_bts *bts,
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bitvec * dest, uint8_t downlink, uint8_t ra,
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bitvec * dest, uint8_t downlink, uint8_t ra,
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@ -81,85 +172,13 @@ int Encoding::write_immediate_assignment(
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plen = wp / 8;
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plen = wp / 8;
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if (downlink)
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if (downlink)
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{
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write_ia_rest_downlink(dest, wp,
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// GSM 04.08 10.5.2.16 IA Rest Octets
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tfi, tlli, polling, fn,
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bitvec_write_field_lh(dest, wp, 3, 2); // "HH"
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alpha, gamma, ta_idx);
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bitvec_write_field(dest, wp, 1, 2); // "01" Packet Downlink Assignment
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bitvec_write_field(dest, wp,tlli,32); // TLLI
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bitvec_write_field(dest, wp,0x1,1); // switch TFI : on
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bitvec_write_field(dest, wp,tfi,5); // TFI
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bitvec_write_field(dest, wp,0x0,1); // RLC acknowledged mode
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA
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} else {
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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}
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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bitvec_write_field(dest, wp,polling,1); // Polling Bit
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bitvec_write_field(dest, wp,!polling,1); // TA_VALID ???
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if (ta_idx < 0) {
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bitvec_write_field(dest, wp,0x0,1); // switch TIMING_ADVANCE_INDEX = off
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} else {
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bitvec_write_field(dest, wp,0x1,1); // switch TIMING_ADVANCE_INDEX = on
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bitvec_write_field(dest, wp,ta_idx,4); // TIMING_ADVANCE_INDEX
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}
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if (polling) {
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bitvec_write_field(dest, wp,0x1,1); // TBF Starting TIME present
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bitvec_write_field(dest, wp,(fn / (26 * 51)) % 32,5); // T1'
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bitvec_write_field(dest, wp,fn % 51,6); // T3
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bitvec_write_field(dest, wp,fn % 26,5); // T2
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} else {
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bitvec_write_field(dest, wp,0x0,1); // TBF Starting TIME present
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}
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bitvec_write_field(dest, wp,0x0,1); // P0 not present
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// bitvec_write_field(dest, wp,0x1,1); // P0 not present
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// bitvec_write_field(dest, wp,0xb,4);
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}
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else
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else
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{
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write_ia_rest_uplink(bts, dest, wp,
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// GMS 04.08 10.5.2.37b 10.5.2.16
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tfi, usf, fn, single_block,
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bitvec_write_field_lh(dest, wp, 3, 2); // "HH"
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alpha, gamma, ta_idx);
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bitvec_write_field(dest, wp, 0, 2); // "0" Packet Uplink Assignment
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if (single_block) {
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bitvec_write_field(dest, wp, 0, 1); // Block Allocation : Single Block Allocation
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA = present
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} else
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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if (ta_idx < 0) {
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bitvec_write_field(dest, wp,0x0,1); // switch TIMING_ADVANCE_INDEX = off
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} else {
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bitvec_write_field(dest, wp,0x1,1); // switch TIMING_ADVANCE_INDEX = on
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bitvec_write_field(dest, wp,ta_idx,4); // TIMING_ADVANCE_INDEX
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}
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bitvec_write_field(dest, wp, 1, 1); // TBF_STARTING_TIME_FLAG
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bitvec_write_field(dest, wp,(fn / (26 * 51)) % 32,5); // T1'
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bitvec_write_field(dest, wp,fn % 51,6); // T3
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bitvec_write_field(dest, wp,fn % 26,5); // T2
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} else {
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bitvec_write_field(dest, wp, 1, 1); // Block Allocation : Not Single Block Allocation
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bitvec_write_field(dest, wp, tfi, 5); // TFI_ASSIGNMENT Temporary Flow Identity
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bitvec_write_field(dest, wp, 0, 1); // POLLING
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bitvec_write_field(dest, wp, 0, 1); // ALLOCATION_TYPE: dynamic
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bitvec_write_field(dest, wp, usf, 3); // USF
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bitvec_write_field(dest, wp, 0, 1); // USF_GRANULARITY
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bitvec_write_field(dest, wp, 0, 1); // "0" power control: Not Present
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bitvec_write_field(dest, wp, bts->initial_cs_ul-1, 2); // CHANNEL_CODING_COMMAND
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bitvec_write_field(dest, wp, 1, 1); // TLLI_BLOCK_CHANNEL_CODING
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if (alpha) {
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bitvec_write_field(dest, wp,0x1,1); // ALPHA = present
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bitvec_write_field(dest, wp,alpha,4); // ALPHA
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} else
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bitvec_write_field(dest, wp,0x0,1); // ALPHA = not present
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bitvec_write_field(dest, wp,gamma,5); // GAMMA power control parameter
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/* note: there is no choise for TAI and no starting time */
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bitvec_write_field(dest, wp, 0, 1); // switch TIMING_ADVANCE_INDEX = off
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bitvec_write_field(dest, wp, 0, 1); // TBF_STARTING_TIME_FLAG
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}
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}
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return plen;
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return plen;
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}
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}
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