summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorVadim Yanitskiy <vyanitskiy@sysmocom.de>2020-07-31 00:42:01 +0700
committerVadim Yanitskiy <vyanitskiy@sysmocom.de>2020-07-31 00:42:01 +0700
commit7c7632de3ebb1eb7706047c445845e97ab8717b4 (patch)
tree37727922f15ae5f1e7426dee8ce37612f7230763
parent8208a336ab5ed81f8fcf628c6d3f0fbbef12c393 (diff)
firmware: add possibility to configure TCH loops in the DSP
-rw-r--r--include/l1ctl_proto.h18
-rw-r--r--src/target/firmware/include/layer1/sync.h3
-rw-r--r--src/target/firmware/layer1/l23_api.c3
-rw-r--r--src/target/firmware/layer1/prim_tch.c6
4 files changed, 25 insertions, 5 deletions
diff --git a/include/l1ctl_proto.h b/include/l1ctl_proto.h
index 05d65deb..cf41ac74 100644
--- a/include/l1ctl_proto.h
+++ b/include/l1ctl_proto.h
@@ -149,11 +149,24 @@ struct l1ctl_ccch_mode_conf {
uint8_t padding[3];
} __attribute__((packed));
+/* 3GPP TS 44.014, section 5.1 (Calypso specific numbers) */
+enum l1ctl_tch_loop_mode {
+ L1CTL_TCH_LOOP_OPEN = 0x00,
+ L1CTL_TCH_LOOP_A = 0x01,
+ L1CTL_TCH_LOOP_B = 0x02,
+ L1CTL_TCH_LOOP_C = 0x03,
+ L1CTL_TCH_LOOP_D = 0x04,
+ L1CTL_TCH_LOOP_E = 0x05,
+ L1CTL_TCH_LOOP_F = 0x06,
+ L1CTL_TCH_LOOP_I = 0x07,
+};
+
/* TCH mode was changed */
struct l1ctl_tch_mode_conf {
uint8_t tch_mode; /* enum tch_mode */
uint8_t audio_mode;
- uint8_t padding[2];
+ uint8_t tch_loop_mode; /* enum l1ctl_tch_loop_mode */
+ uint8_t padding[1];
} __attribute__((packed));
/* data on the CCCH was found. This is following the header */
@@ -231,7 +244,8 @@ struct l1ctl_tch_mode_req {
#define AUDIO_RX_SPEAKER (1<<2)
#define AUDIO_RX_TRAFFIC_IND (1<<3)
uint8_t audio_mode;
- uint8_t padding[2];
+ uint8_t tch_loop_mode; /* enum l1ctl_tch_loop_mode */
+ uint8_t padding[1];
} __attribute__((packed));
/* the l1_info_ul header is in front */
diff --git a/src/target/firmware/include/layer1/sync.h b/src/target/firmware/include/layer1/sync.h
index 6ed3890c..dd932421 100644
--- a/src/target/firmware/include/layer1/sync.h
+++ b/src/target/firmware/include/layer1/sync.h
@@ -83,6 +83,9 @@ struct l1s_state {
uint8_t tch_sync;
uint8_t audio_mode;
+ /* 3GPP TS 44.014, section 5.1 (Calypso DSP specific numbers) */
+ enum l1ctl_tch_loop_mode tch_loop_mode;
+
/* Transmit queues of pending packets for main DCCH and ACCH */
struct llist_head tx_queue[_NUM_L1S_CHAN];
struct msgb *tx_meas;
diff --git a/src/target/firmware/layer1/l23_api.c b/src/target/firmware/layer1/l23_api.c
index d52d8f6e..62c21f67 100644
--- a/src/target/firmware/layer1/l23_api.c
+++ b/src/target/firmware/layer1/l23_api.c
@@ -352,6 +352,7 @@ static void l1ctl_rx_dm_rel_req(struct msgb *msg)
dsp_load_ciph_param(0, NULL);
l1a_tch_mode_set(GSM48_CMODE_SIGN);
audio_set_enabled(GSM48_CMODE_SIGN, 0);
+ l1s.tch_loop_mode = L1CTL_TCH_LOOP_OPEN;
l1s.neigh_pm.n = 0;
}
@@ -521,6 +522,7 @@ static void l1ctl_tx_tch_mode_conf(uint8_t tch_mode, uint8_t audio_mode)
msgb_put(msg, sizeof(*mode_conf));
mode_conf->tch_mode = tch_mode;
mode_conf->audio_mode = audio_mode;
+ mode_conf->tch_loop_mode = l1s.tch_loop_mode;
l1_queue_for_l2(msg);
}
@@ -542,6 +544,7 @@ static void l1ctl_rx_tch_mode_req(struct msgb *msg)
audio_set_enabled(tch_mode, audio_mode);
l1s.tch_sync = 1; /* Needed for audio to work */
+ l1s.tch_loop_mode = tch_mode_req->tch_loop_mode;
l1ctl_tx_tch_mode_conf(tch_mode, audio_mode);
}
diff --git a/src/target/firmware/layer1/prim_tch.c b/src/target/firmware/layer1/prim_tch.c
index 02546544..40ef8f3c 100644
--- a/src/target/firmware/layer1/prim_tch.c
+++ b/src/target/firmware/layer1/prim_tch.c
@@ -526,7 +526,7 @@ skip_tx_traffic:
dsp_load_tch_param(
&l1s.next_time,
tch_mode, tch_f_hn ? TCH_F : TCH_H, tch_sub,
- 0, sync, tn
+ l1s.tch_loop_mode, sync, tn
);
dsp_load_rx_task(
@@ -585,7 +585,7 @@ static int l1s_tch_d_cmd(__unused uint8_t p1, __unused uint8_t p2, uint16_t p3)
dsp_load_tch_param(
&l1s.next_time,
tch_mode, tch_f_hn ? TCH_F : TCH_H, tch_sub,
- 0, 0, tn
+ l1s.tch_loop_mode, 0, tn
);
dsp_load_rx_task(TCHD_DSP_TASK, 0, tsc); /* burst_id unused for TCH */
@@ -791,7 +791,7 @@ static int l1s_tch_a_cmd(__unused uint8_t p1, __unused uint8_t p2, uint16_t p3)
dsp_load_tch_param(
&l1s.next_time,
tch_mode, tch_f_hn ? TCH_F : TCH_H, tch_sub,
- 0, 0, tn
+ l1s.tch_loop_mode, 0, tn
);
dsp_load_rx_task(