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authorSteve Markgraf <steve@steve-m.de>2013-01-04 00:00:40 +0100
committerSylvain Munaut <tnt@246tNt.com>2013-01-05 18:41:18 +0100
commitee7fbbda22aedcdd8b6e3a5828fbdafd84571d72 (patch)
tree04eb6d562ea6aba612b4cbf839d22b447b381ff1
parent37a0543e26a8fb6c22dfaa3b4fec5acb96c86999 (diff)
fw: pirelli_dpl10: initialize address line 22 for flash access
Signed-off-by: Steve Markgraf <steve@steve-m.de>
-rw-r--r--src/target/firmware/board/pirelli_dpl10/init.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/target/firmware/board/pirelli_dpl10/init.c b/src/target/firmware/board/pirelli_dpl10/init.c
index ea62f09..4c74a6d 100644
--- a/src/target/firmware/board/pirelli_dpl10/init.c
+++ b/src/target/firmware/board/pirelli_dpl10/init.c
@@ -51,6 +51,7 @@
#define ARMIO_LATCH_OUT 0xfffe4802
#define IO_CNTL_REG 0xfffe4804
+#define ARM_CONF_REG 0xfffef006
#define ASIC_CONF_REG 0xfffef008
#define IO_CONF_REG 0xfffef00a
@@ -83,6 +84,11 @@ static void board_io_init(void)
reg &= ~(1 << 7);
reg |= (1 << 4) | (1 << 1);
writew(reg, ARMIO_LATCH_OUT);
+
+ /* configure ADD(22), needed for second half of flash */
+ reg = readw(ARM_CONF_REG);
+ reg |= (1 << 3);
+ writew(reg, ARM_CONF_REG);
}
void board_init(int with_irq)