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authorEric Wild <ewild@sysmocom.de>2020-10-17 19:20:05 +0200
committerEric Wild <ewild@sysmocom.de>2020-10-17 19:23:37 +0200
commitb06a90d43219da3a6961f3dae4e5dc8bd0c95fc4 (patch)
tree0093e5dbbf11795bfec7a2d470bbcad0bda2b399
parent49c5409df369cbc144fa813a1cc26568ecb98cdd (diff)
7816 fsm: adjust atr start timeout
The calculation was still expecting timeouts measured in GT instead of WT, so the actual wait time for empty sim trays (or unresponsive cards) was 58 seconds instead of ~ 1.5s - a bit longer than necessary. Total timeout if the atr reception has started is still approximately 45s as per spec (9600 ETU x 32). Closes: OS#4815 Change-Id: I9f0ae104fac690127ab039ee7d9005e8d3896a1c
-rw-r--r--ccid_common/iso7816_fsm.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/ccid_common/iso7816_fsm.c b/ccid_common/iso7816_fsm.c
index 1835368..bf19539 100644
--- a/ccid_common/iso7816_fsm.c
+++ b/ccid_common/iso7816_fsm.c
@@ -250,10 +250,9 @@ static void iso7816_3_reset_action(struct osmo_fsm_inst *fi, uint32_t event, voi
card_uart_ctrl(ip->uart, CUART_CTL_RX, true);
/* let's be reasonable here: the 40k cycle delay to ATR start is
- * ~1.4ms @ 2.5Mhz/6720 baud, 1ETU = 372 cycles -> 40k/372=107/12ETU ~ 9 byte
- * default timeout for rx is 9600 ETU, ATR might be missing the TCK
- * so it might time out, so just add this delay */
- card_uart_ctrl(ip->uart, CUART_CTL_RX_TIMER_HINT, 32+9);
+ * ~1.4ms @ 2.5Mhz/6720 baud, 1ETU = 372 cycles -> 40k/372=107/12ETU(GT!) ~ 9 byte
+ * but this is WT not GT, so default 9600 x ETU -> 1 byte wait time is ~1.5s */
+ card_uart_ctrl(ip->uart, CUART_CTL_RX_TIMER_HINT, 1);
osmo_fsm_inst_state_chg(fi, ISO7816_S_WAIT_ATR, 0, 0);
break;
case ISO7816_E_POWER_UP_IND:
@@ -280,6 +279,9 @@ static void iso7816_3_wait_atr_action(struct osmo_fsm_inst *fi, uint32_t event,
switch (event) {
case ISO7816_E_RX_SINGLE:
+ /* let's expect at most 32 more bytes */
+ card_uart_ctrl(ip->uart, CUART_CTL_RX_TIMER_HINT, 32);
+
osmo_fsm_inst_state_chg(fi, ISO7816_S_IN_ATR, 0, 0);
osmo_fsm_inst_dispatch(ip->atr_fi, event, data);
break;