From 2fdda101a3c040460530a98535016546a11e29fc Mon Sep 17 00:00:00 2001 From: "(no author)" <(no author)@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> Date: Sat, 9 Sep 2006 11:21:43 +0000 Subject: remove old files git-svn-id: https://svn.openpcd.org:2342/trunk@153 6dc7ffe9-61d6-0310-9af1-9938baff3ed1 --- openpcd/firmware/src/picc/tc.c | 50 ------------------------------------------ openpcd/firmware/src/picc/tc.h | 11 ---------- 2 files changed, 61 deletions(-) delete mode 100644 openpcd/firmware/src/picc/tc.c delete mode 100644 openpcd/firmware/src/picc/tc.h (limited to 'openpcd') diff --git a/openpcd/firmware/src/picc/tc.c b/openpcd/firmware/src/picc/tc.c deleted file mode 100644 index 5a26376..0000000 --- a/openpcd/firmware/src/picc/tc.c +++ /dev/null @@ -1,50 +0,0 @@ -/* OpenPC TC (Timer / Clock) support code - * (C) 2006 by Harald Welte - * - * This idea of this code is to feed the 13.56MHz carrier clock of RC632 - * into TCLK1, which is routed to XC1. Then configure TC0 to divide this - * clock by a configurable divider. - * - * PICC Simulator Side: - * In order to support responding to synchronous frames (REQA/WUPA/ANTICOL), - * we need a second Timer/Counter (TC1). This unit is reset by an external - * event (rising edge of modulation pause PCD->PICC) connected to TIOB2, and - * counts up to a configurable number of carrier clock cycles (RA). Once the - * RA value is reached, TIOA2 will see a rising edge. This rising edge will - * be interconnected to TF (Tx Frame) of the SSC to start transmitting our - * synchronous response. - * - */ - -#include -#include - -#include "../openpcd.h" -#include -#include - -void tc_fdt_set(u_int16_t count) -{ - tcb->TC_TC2.TC_RA = count; -} - -void tc_fdt_init(void) -{ - AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, AT91C_PA15_TF, - AT91C_PA26_TIOA2, AT91C_PA17_TIOB2); - AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, - ((unsigned int) 1 << AT91C_ID_TC2)); - /* Clock XC1, Wave Mode, No automatic reset on RC comp - * TIOA2 in RA comp = set, TIOA2 on RC comp = clear, - * TIOB2 as input, EEVT = TIOB2, Reset/Trigger on EEVT */ - tcb->TCB_TC2.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE | - AT91C_TC_WAVESEL_UP | - AT91C_TC_ACPA_SET | AT91C_ACPC_CLEAR | - AT91C_TC_BEEVT_NONE | AT91C_TC_BCPB_NONE | - AT91C_TC_EEVT_TIOB | AT91C_TC_ETRGEDG_RISING | - AT91C_TC_ENETRG ; - - /* Reset to start timers */ - tcb->TCB_BCR = 1; -} - diff --git a/openpcd/firmware/src/picc/tc.h b/openpcd/firmware/src/picc/tc.h deleted file mode 100644 index e4a2b37..0000000 --- a/openpcd/firmware/src/picc/tc.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _TC_FDT_H -#define _TC_FDT_H - -#include -#include - -extern AT91PS_TCB tcb; -extern void tc_fdt_init(void); -extern void tc_fdt_set(u_int16_t count); - -#endif -- cgit v1.2.3