From 69ce674bfa69c55cdf32710d811fa89738eafbef Mon Sep 17 00:00:00 2001 From: Stanislaw Gruszka Date: Fri, 5 Aug 2011 13:10:34 +0200 Subject: ath9k: do btcoex ASPM disabling at initialization time Disable ASPM in pci ->probe on upstream (device) and downstream (PCIe port) component. According to e1000e driver authors this is required. I did not find that requirement in PCIe spec, but it seems to be logical for me. This need to be fixed for CONFIG_PCIEASPM, that will be done later ... Signed-off-by: Stanislaw Gruszka Signed-off-by: John W. Linville --- drivers/net/wireless/ath/ath9k/pci.c | 44 ++++++++++++++++++++---------------- 1 file changed, 25 insertions(+), 19 deletions(-) (limited to 'drivers/net/wireless/ath/ath9k/pci.c') diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index 65cf728fa11..daa26b5d745 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c @@ -89,23 +89,6 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data) return true; } -/* - * Bluetooth coexistance requires disabling ASPM. - */ -static void ath_pci_bt_coex_prep(struct ath_common *common) -{ - struct ath_softc *sc = (struct ath_softc *) common->priv; - struct pci_dev *pdev = to_pci_dev(sc->dev); - u8 aspm; - - if (!pci_is_pcie(pdev)) - return; - - pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm); - aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1); - pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm); -} - static void ath_pci_extn_synch_enable(struct ath_common *common) { struct ath_softc *sc = (struct ath_softc *) common->priv; @@ -117,6 +100,7 @@ static void ath_pci_extn_synch_enable(struct ath_common *common) pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl); } +/* Need to be called after we discover btcoex capabilities */ static void ath_pci_aspm_init(struct ath_common *common) { struct ath_softc *sc = (struct ath_softc *) common->priv; @@ -126,10 +110,33 @@ static void ath_pci_aspm_init(struct ath_common *common) int pos; u8 aspm; - if (!pci_is_pcie(pdev)) + pos = pci_pcie_cap(pdev); + if (!pos) return; parent = pdev->bus->self; + + if (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) { + /* Bluetooth coexistance requires disabling ASPM. */ + pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm); + aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); + pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm); + + /* + * Both upstream and downstream PCIe components should + * have the same ASPM settings. + */ + if (WARN_ON(!parent)) + return; + + pos = pci_pcie_cap(parent); + pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); + aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); + pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm); + + return; + } + if (WARN_ON(!parent)) return; @@ -146,7 +153,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = { .ath_bus_type = ATH_PCI, .read_cachesize = ath_pci_read_cachesize, .eeprom_read = ath_pci_eeprom_read, - .bt_coex_prep = ath_pci_bt_coex_prep, .extn_synch_en = ath_pci_extn_synch_enable, .aspm_init = ath_pci_aspm_init, }; -- cgit v1.2.3