From f000328ac10f23f4841b83ddc60eceb3ba0ac176 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 27 Mar 2009 14:22:26 -0400 Subject: [ARM] Kirkwood: small L2 code cleanup Strictly speaking, a MCR instruction does not produce any output. Signed-off-by: Nicolas Pitre --- arch/arm/mm/cache-feroceon-l2.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 1afed5068c2..6e77c042d8e 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -258,9 +258,7 @@ static void __init enable_dcache(void) static void __init __invalidate_icache(void) { - int dummy; - - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy)); + __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); } static int __init invalidate_and_disable_icache(void) -- cgit v1.2.3