From 304b2c684e42af5b72d643322f783d88538dc817 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sun, 6 May 2012 09:21:57 +0400 Subject: ARM: clps711x: Using a single definition for the PHYS and VIRT registers offset Using a single definition for the physical and virtual address register for all variants boards clps711x. This patch also includes the use of a single function clps_read/write in some units. Signed-off-by: Alexander Shiyan Signed-off-by: Arnd Bergmann --- arch/arm/mach-clps711x/include/mach/debug-macro.S | 5 ++-- arch/arm/mach-clps711x/include/mach/entry-macro.S | 3 +- arch/arm/mach-clps711x/include/mach/hardware.h | 36 ++++++++--------------- arch/arm/mach-clps711x/include/mach/time.h | 2 +- arch/arm/mach-clps711x/include/mach/uncompress.h | 19 ++++++------ 5 files changed, 26 insertions(+), 39 deletions(-) (limited to 'arch/arm/mach-clps711x/include/mach') diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index b802e8a5183..118b3d93057 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -12,7 +12,6 @@ */ #include -#include .macro addruart, rp, rv, tmp #ifndef CONFIG_DEBUG_CLPS711X_UART2 @@ -20,8 +19,8 @@ #else mov \rp, #0x1000 @ UART2 #endif - orr \rv, \rp, #CLPS7111_VIRT_BASE - orr \rp, \rp, #CLPS7111_PHYS_BASE + orr \rv, \rp, #CLPS711X_VIRT_BASE + orr \rp, \rp, #CLPS711X_PHYS_BASE .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S index 125af59d7a2..56e5c2c2350 100644 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S @@ -8,7 +8,6 @@ * warranty of any kind, whether express or implied. */ #include -#include .macro get_irqnr_preamble, base, tmp .endm @@ -18,7 +17,7 @@ #endif .macro get_irqnr_and_base, irqnr, stat, base, mask - mov \base, #CLPS7111_BASE + mov \base, #CLPS711X_VIRT_BASE ldr \stat, [\base, #INTSR1] ldr \mask, [\base, #INTMR1] mov \irqnr, #4 diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index d0b7d870be9..1026ac96870 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -19,12 +19,21 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H +#ifndef __MACH_HARDWARE_H +#define __MACH_HARDWARE_H +#include + +#define CLPS711X_VIRT_BASE IOMEM(0xff000000) -#define CLPS7111_VIRT_BASE 0xff000000 -#define CLPS7111_BASE CLPS7111_VIRT_BASE +#ifndef __ASSEMBLY__ +#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) +#define clps_readw(off) readw(CLPS711X_VIRT_BASE + (off)) +#define clps_readl(off) readl(CLPS711X_VIRT_BASE + (off)) +#define clps_writeb(val,off) writeb(val, CLPS711X_VIRT_BASE + (off)) +#define clps_writew(val,off) writew(val, CLPS711X_VIRT_BASE + (off)) +#define clps_writel(val,off) writel(val, CLPS711X_VIRT_BASE + (off)) +#endif /* * The physical addresses that the external chip select signals map to is @@ -54,14 +63,10 @@ #if defined (CONFIG_ARCH_EP7211) -#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE -#define EP7211_BASE CLPS7111_VIRT_BASE #include #elif defined (CONFIG_ARCH_EP7212) -#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE -#define EP7212_BASE CLPS7111_VIRT_BASE #include #endif @@ -71,10 +76,6 @@ #if defined (CONFIG_ARCH_AUTCPU12) -#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE -#define CS89712_BASE CLPS7111_VIRT_BASE - -#include #include #include @@ -83,15 +84,9 @@ #if defined (CONFIG_ARCH_CDB89712) -#include #include #include -/* static cdb89712_map_io() areas */ -#define REGISTER_START 0x80000000 -#define REGISTER_SIZE 0x4000 -#define REGISTER_BASE 0xff000000 - #define ETHER_START 0x20000000 #define ETHER_SIZE 0x1000 #define ETHER_BASE 0xfe000000 @@ -154,13 +149,8 @@ #if defined (CONFIG_ARCH_CEIVA) -#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE -#define CEIVA_BASE CLPS7111_VIRT_BASE - -#include #include - /* * The two flash banks are wired to chip selects 0 and 1. This is the mapping * for them. diff --git a/arch/arm/mach-clps711x/include/mach/time.h b/arch/arm/mach-clps711x/include/mach/time.h index 61fef9129c6..5f65865884c 100644 --- a/arch/arm/mach-clps711x/include/mach/time.h +++ b/arch/arm/mach-clps711x/include/mach/time.h @@ -18,7 +18,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include +#include extern void clps711x_setup_timer(void); diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h index 35ed731b9f1..263f8393ccb 100644 --- a/arch/arm/mach-clps711x/include/mach/uncompress.h +++ b/arch/arm/mach-clps711x/include/mach/uncompress.h @@ -17,15 +17,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include -#undef CLPS7111_BASE -#define CLPS7111_BASE CLPS7111_PHYS_BASE - -#define __raw_readl(p) (*(unsigned long *)(p)) -#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) - #ifdef CONFIG_DEBUG_CLPS711X_UART2 #define SYSFLGx SYSFLG2 #define UARTDRx UARTDR2 @@ -34,19 +27,25 @@ #define UARTDRx UARTDR1 #endif +#define phys_reg(x) (*(volatile u32 *)(CLPS711X_PHYS_BASE + (x))) + /* + * The following code assumes the serial port has already been + * initialized by the bootloader. If you didn't setup a port in + * your bootloader then nothing will appear (which might be desired). + * * This does not append a newline */ static inline void putc(int c) { - while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) + while (phys_reg(SYSFLGx) & SYSFLG_UTXFF) barrier(); - clps_writel(c, UARTDRx); + phys_reg(UARTDRx) = c; } static inline void flush(void) { - while (clps_readl(SYSFLGx) & SYSFLG_UBUSY) + while (phys_reg(SYSFLGx) & SYSFLG_UBUSY) barrier(); } -- cgit v1.2.3