From 91a9fec022f5d98835e27d5307d487da3798040c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 31 Aug 2012 00:03:46 -0500 Subject: ARM: move debug macros to common location Based on suggestion by Russell King, create a common location for debug macros and select the included debug macro file using config option. Signed-off-by: Rob Herring Cc: Russell King --- arch/arm/include/debug/icedcc.S | 90 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 arch/arm/include/debug/icedcc.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S new file mode 100644 index 00000000000..43afcb021fa --- /dev/null +++ b/arch/arm/include/debug/icedcc.S @@ -0,0 +1,90 @@ +/* + * arch/arm/include/debug/icedcc.S + * + * Copyright (C) 1994-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + + @@ debug using ARM EmbeddedICE DCC channel + + .macro addruart, rp, rv, tmp + .endm + +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) + + .macro senduart, rd, rx + mcr p14, 0, \rd, c0, c5, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c0, c1, 0 + tst \rx, #0x20000000 + beq 1001b + .endm + + .macro waituart, rd, rx + mov \rd, #0x2000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c0, c1, 0 + tst \rx, #0x20000000 + bne 1001b +1002: + .endm + +#elif defined(CONFIG_CPU_XSCALE) + + .macro senduart, rd, rx + mcr p14, 0, \rd, c8, c0, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c14, c0, 0 + tst \rx, #0x10000000 + beq 1001b + .endm + + .macro waituart, rd, rx + mov \rd, #0x10000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c14, c0, 0 + tst \rx, #0x10000000 + bne 1001b +1002: + .endm + +#else + + .macro senduart, rd, rx + mcr p14, 0, \rd, c1, c0, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c0, c0, 0 + tst \rx, #2 + beq 1001b + + .endm + + .macro waituart, rd, rx + mov \rd, #0x2000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c0, c0, 0 + tst \rx, #2 + bne 1001b +1002: + .endm + +#endif /* CONFIG_CPU_V6 */ -- cgit v1.2.3 From 2e9bb084e85d7c160586faf91677a0d7798f1596 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 31 Aug 2012 00:04:22 -0500 Subject: ARM: highbank: move debug macros to include/debug Move highbank debug-macro.S over to common debug macro directory. Also, remove v7 specific movw/movt instructions so this can compile under v6 mode. Signed-off-by: Rob Herring --- arch/arm/include/debug/highbank.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 arch/arm/include/debug/highbank.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/highbank.S b/arch/arm/include/debug/highbank.S new file mode 100644 index 00000000000..8cad4322a5a --- /dev/null +++ b/arch/arm/include/debug/highbank.S @@ -0,0 +1,17 @@ +/* + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart,rp,rv,tmp + ldr \rv, =0xfee36000 + ldr \rp, =0xfff36000 + .endm + +#include -- cgit v1.2.3 From fa04e4dbd3a0e68b9daf07a096db369b5a92f1bf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 31 Aug 2012 00:08:21 -0500 Subject: ARM: vexpress: move debug macros to include/debug Move vexpress debug-macro.S over to common debug macro directory. Signed-off-by: Rob Herring Cc: Pawel Moll --- arch/arm/include/debug/vexpress.S | 84 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 arch/arm/include/debug/vexpress.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S new file mode 100644 index 00000000000..9f509f55d07 --- /dev/null +++ b/arch/arm/include/debug/vexpress.S @@ -0,0 +1,84 @@ +/* arch/arm/mach-realview/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define DEBUG_LL_PHYS_BASE 0x10000000 +#define DEBUG_LL_UART_OFFSET 0x00009000 + +#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000 +#define DEBUG_LL_UART_OFFSET_RS1 0x00090000 + +#define DEBUG_LL_VIRT_BASE 0xf8000000 + +#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) + + .macro addruart,rp,rv,tmp + + @ Make an educated guess regarding the memory map: + @ - the original A9 core tile, which has MPCore peripherals + @ located at 0x1e000000, should use UART at 0x10009000 + @ - all other (RS1 complaint) tiles use UART mapped + @ at 0x1c090000 + mrc p15, 4, \tmp, c15, c0, 0 + cmp \tmp, #0x1e000000 + + @ Original memory map + moveq \rp, #DEBUG_LL_UART_OFFSET + orreq \rv, \rp, #DEBUG_LL_VIRT_BASE + orreq \rp, \rp, #DEBUG_LL_PHYS_BASE + + @ RS1 memory map + movne \rp, #DEBUG_LL_UART_OFFSET_RS1 + orrne \rv, \rp, #DEBUG_LL_VIRT_BASE + orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 + + .endm + +#include + +#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9) + + .macro addruart,rp,rv,tmp + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rv, \rp, #DEBUG_LL_VIRT_BASE + orr \rp, \rp, #DEBUG_LL_PHYS_BASE + .endm + +#include + +#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1) + + .macro addruart,rp,rv,tmp + mov \rp, #DEBUG_LL_UART_OFFSET_RS1 + orr \rv, \rp, #DEBUG_LL_VIRT_BASE + orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 + .endm + +#include + +#else /* CONFIG_DEBUG_LL_UART_NONE */ + + .macro addruart, rp, rv, tmp + /* Safe dummy values */ + mov \rp, #0 + mov \rv, #DEBUG_LL_VIRT_BASE + .endm + + .macro senduart,rd,rx + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx + .endm + +#endif -- cgit v1.2.3 From bfd5af9940c665ec0148f6d280aab54736ffdbe7 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 2 Sep 2012 14:41:34 -0500 Subject: ARM: mvebu: move debug macros to include/debug Move mvebu debug-macro.S over to common debug macro directory. Signed-off-by: Rob Herring Cc: Jason Cooper Cc: Andrew Lunn --- arch/arm/include/debug/mvebu.S | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 arch/arm/include/debug/mvebu.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S new file mode 100644 index 00000000000..865c6d02b33 --- /dev/null +++ b/arch/arm/include/debug/mvebu.S @@ -0,0 +1,25 @@ +/* + * Early serial output macro for Marvell SoC + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem + * Gregory Clement + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 +#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 + + .macro addruart, rp, rv, tmp + ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE + ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include -- cgit v1.2.3 From 6111bf7c578dafc08785c02678bfa1ec9b6f4a73 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 6 Sep 2012 14:11:28 -0500 Subject: ARM: socfpga: move debug macros to include/debug Move socfpga debug-macro.S over to common debug macro directory. Signed-off-by: Rob Herring Acked-by: Dinh Nguyen --- arch/arm/include/debug/socfpga.S | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 arch/arm/include/debug/socfpga.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S new file mode 100644 index 00000000000..d6f26d23374 --- /dev/null +++ b/arch/arm/include/debug/socfpga.S @@ -0,0 +1,16 @@ +/* + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart, rp, rv, tmp + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rp, \rp, #0x00c00000 + orr \rv, \rp, #0xfe000000 @ virtual base + orr \rp, \rp, #0xff000000 @ physical base + .endm + -- cgit v1.2.3 From 59bba2a9854a2de869440ff799d8e3dfd4779543 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 6 Sep 2012 14:14:46 -0500 Subject: ARM: picoxcell: move debug macros to include/debug Move picoxcell debug-macro.S over to common debug macro directory. Signed-off-by: Rob Herring Cc: Jamie Iles --- arch/arm/include/debug/picoxcell.S | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/include/debug/picoxcell.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S new file mode 100644 index 00000000000..7419deb1b94 --- /dev/null +++ b/arch/arm/include/debug/picoxcell.S @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ +#include + +#define UART_SHIFT 2 +#define PICOXCELL_UART1_BASE 0x80230000 +#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) + + .macro addruart, rp, rv, tmp + ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) + ldr \rp, =PICOXCELL_UART1_BASE + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm -- cgit v1.2.3 From 6dde5ac5220b3b9c28f82f291b64eca3e5ebe80d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 16 Sep 2012 20:50:45 +0800 Subject: ARM: imx: move debug macros to include/debug Move imx debug-macro.S over to common debug macro directory. It removes the inclusion to hardware.h by hard-coding the physical address of uart port and copying IMX_IO_P2V from hardware.h. Since we will need a common solution, which might use a fixed virtual address for uart port across platforms, we make a copy of IMX_IO_P2V here as a temporary solution to enable low-level debug for imx multi-platform build. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Arnd Bergmann --- arch/arm/include/debug/imx.S | 62 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 arch/arm/include/debug/imx.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S new file mode 100644 index 00000000000..0b65d792f66 --- /dev/null +++ b/arch/arm/include/debug/imx.S @@ -0,0 +1,62 @@ +/* arch/arm/mach-imx/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifdef CONFIG_DEBUG_IMX1_UART +#define UART_PADDR 0x00206000 +#elif defined (CONFIG_DEBUG_IMX25_UART) +#define UART_PADDR 0x43f90000 +#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) +#define UART_PADDR 0x1000a000 +#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) +#define UART_PADDR 0x43f90000 +#elif defined (CONFIG_DEBUG_IMX51_UART) +#define UART_PADDR 0x73fbc000 +#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) +#define UART_PADDR 0x53fbc000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART2) +#define UART_PADDR 0x021e8000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART4) +#define UART_PADDR 0x021f0000 +#endif + +/* + * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to + * stay sync with that. It's hard to maintain, and should be fixed + * globally for multi-platform build to use a fixed virtual address + * for low-level debug uart port across platforms. + */ +#define IMX_IO_P2V(x) ( \ + (((x) & 0x80000000) >> 7) | \ + (0xf4000000 + \ + (((x) & 0x50000000) >> 6) + \ + (((x) & 0x0b000000) >> 4) + \ + (((x) & 0x000fffff)))) + +#define UART_VADDR IMX_IO_P2V(UART_PADDR) + + .macro addruart, rp, rv, tmp + ldr \rp, =UART_PADDR @ physical + ldr \rv, =UART_VADDR @ virtual + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x40] @ TXDATA + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #0x98] @ SR2 + tst \rd, #1 << 3 @ TXDC + beq 1002b @ wait until transmit done + .endm -- cgit v1.2.3 From 852663d94f0cc44199c31c0e42d4801302f41705 Mon Sep 17 00:00:00 2001 From: Pawel Moll Date: Tue, 4 Sep 2012 17:06:20 +0100 Subject: ARM: vexpress: Make the debug UART detection more specific Base the UART detection heuristic on architecturally defined MIDR register instead of implementation dependent CBAR. The only tile using the original memory map is V2P-CA9 with Cortex A9 r0p1, which MIDR contains value 0x410fc091. Signed-off-by: Pawel Moll --- arch/arm/include/debug/vexpress.S | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S index 9f509f55d07..0c6abbf4c82 100644 --- a/arch/arm/include/debug/vexpress.S +++ b/arch/arm/include/debug/vexpress.S @@ -23,12 +23,14 @@ .macro addruart,rp,rv,tmp @ Make an educated guess regarding the memory map: - @ - the original A9 core tile, which has MPCore peripherals - @ located at 0x1e000000, should use UART at 0x10009000 + @ - the original A9 core tile (based on ARM Cortex-A9 r0p1) + @ should use UART at 0x10009000 @ - all other (RS1 complaint) tiles use UART mapped @ at 0x1c090000 - mrc p15, 4, \tmp, c15, c0, 0 - cmp \tmp, #0x1e000000 + mrc p15, 0, \rp, c0, c0, 0 + movw \rv, #0xc091 + movt \rv, #0x410f + cmp \rp, \rv @ Original memory map moveq \rp, #DEBUG_LL_UART_OFFSET -- cgit v1.2.3 From ef3f94412a4d7e107392e7c7cfc3e2d0668aa1aa Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Wed, 17 Oct 2012 20:16:48 +0200 Subject: ARM: socfpga: Fix socfpga compilation with early_printk() enabled This fixes early_printk() compilation for socfpga. (senduart/busyuart/waituart were missing). It does that by making Picochip code generic. Signed-off-by: Pavel Machek Acked-by: Dinh Nguyen Acked-by: Jamie Iles Signed-off-by: Arnd Bergmann --- arch/arm/include/debug/8250_32.S | 27 +++++++++++++++++++++++++++ arch/arm/include/debug/picoxcell.S | 18 +----------------- arch/arm/include/debug/socfpga.S | 5 +++++ 3 files changed, 33 insertions(+), 17 deletions(-) create mode 100644 arch/arm/include/debug/8250_32.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S new file mode 100644 index 00000000000..8db01eeabbb --- /dev/null +++ b/arch/arm/include/debug/8250_32.S @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ + +#include + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S index 7419deb1b94..bc1f07c49cd 100644 --- a/arch/arm/include/debug/picoxcell.S +++ b/arch/arm/include/debug/picoxcell.S @@ -5,10 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit - * accesses to the 8250. */ -#include #define UART_SHIFT 2 #define PICOXCELL_UART1_BASE 0x80230000 @@ -19,17 +16,4 @@ ldr \rp, =PICOXCELL_UART1_BASE .endm - .macro senduart,rd,rx - str \rd, [\rx, #UART_TX << UART_SHIFT] - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] - and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE - teq \rd, #UART_LSR_TEMT | UART_LSR_THRE - bne 1002b - .endm - - /* The UART's don't have any flow control IO's wired up. */ - .macro waituart,rd,rx - .endm +#include "8250_32.S" diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S index d6f26d23374..966b2f99494 100644 --- a/arch/arm/include/debug/socfpga.S +++ b/arch/arm/include/debug/socfpga.S @@ -7,6 +7,9 @@ * published by the Free Software Foundation. */ +#define UART_SHIFT 2 +#define DEBUG_LL_UART_OFFSET 0x00002000 + .macro addruart, rp, rv, tmp mov \rp, #DEBUG_LL_UART_OFFSET orr \rp, \rp, #0x00c00000 @@ -14,3 +17,5 @@ orr \rp, \rp, #0xff000000 @ physical base .endm +#include "8250_32.S" + -- cgit v1.2.3 From d892a91730013b306cef3b55be6cc0b2755d6d24 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 8 Nov 2012 14:05:23 +0000 Subject: ARM: vexpress: fix ll debug code when building multiplatform After "ARM: vexpress: Make the debug UART detection more specific", building allyesconfig in linux-next now gives me: arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:81: Error: selected processor does not support ARM mode `movw r2,#0xc 091' arch/arm/kernel/debug.S:81: Error: selected processor does not support ARM mode `movt r2,#0x4 10f' arch/arm/kernel/debug.S:97: Error: selected processor does not support ARM mode `movw r2,#0xc 091' arch/arm/kernel/debug.S:97: Error: selected processor does not support ARM mode `movt r2,#0x4 10f' arch/arm/kernel/debug.S:104: Error: selected processor does not support ARM mode `movw r3,#0x c091' arch/arm/kernel/debug.S:104: Error: selected processor does not support ARM mode `movt r3,#0x 410f' Since the code can never get executed on ARMv6 but might be built in a configuration that has ARMv6 enabled, it's safe to just mark it in the assembly source for being ARMv7-only. Signed-off-by: Arnd Bergmann Acked-by: Pawel Moll --- arch/arm/include/debug/vexpress.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S index 0c6abbf4c82..dc8e882a625 100644 --- a/arch/arm/include/debug/vexpress.S +++ b/arch/arm/include/debug/vexpress.S @@ -21,6 +21,7 @@ #if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) .macro addruart,rp,rv,tmp + .arch armv7-a @ Make an educated guess regarding the memory map: @ - the original A9 core tile (based on ARM Cortex-A9 r0p1) -- cgit v1.2.3 From 49c9e60eaaa966cdb02ac9e989eeb6f940691c5d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 8 Oct 2012 13:44:29 +0800 Subject: ARM: imx6q: let users input debug uart port number imx6q gets 5 uart ports in total. Different board design may choose different port as debug uart. For example, imx6q-sabresd uses UART1, imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4. Rather than bloating DEBUG_LL choice list with all these uart ports, the patch introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice. Signed-off-by: Shawn Guo --- arch/arm/include/debug/imx.S | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S index 0b65d792f66..0c4e17d4d35 100644 --- a/arch/arm/include/debug/imx.S +++ b/arch/arm/include/debug/imx.S @@ -10,6 +10,20 @@ * published by the Free Software Foundation. * */ +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + #ifdef CONFIG_DEBUG_IMX1_UART #define UART_PADDR 0x00206000 #elif defined (CONFIG_DEBUG_IMX25_UART) @@ -22,10 +36,8 @@ #define UART_PADDR 0x73fbc000 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR 0x53fbc000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART2) -#define UART_PADDR 0x021e8000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART4) -#define UART_PADDR 0x021f0000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR IMX6Q_DEBUG_UART_BASE #endif /* -- cgit v1.2.3 From 460678035247a9f72a4401dfeb6513ee495bf975 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 25 Sep 2012 15:54:56 -0600 Subject: ARM: tegra: move debug-macro.S to include/debug Move Tegra's debug-macro.S over to the common debug macro directory. Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that all related options are selected in the same place. Tegra's uncompress.h is left in mach-tegra/include/mach; it will be removed whenever Tegra is converted to multi-platform. Signed-off-by: Stephen Warren --- arch/arm/include/debug/tegra.S | 223 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 223 insertions(+) create mode 100644 arch/arm/include/debug/tegra.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S new file mode 100644 index 00000000000..883d7c22fd9 --- /dev/null +++ b/arch/arm/include/debug/tegra.S @@ -0,0 +1,223 @@ +/* + * Copyright (C) 2010,2011 Google, Inc. + * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved. + * + * Author: + * Colin Cross + * Erik Gilling + * Doug Anderson + * Stephen Warren + * + * Portions based on mach-omap2's debug-macro.S + * Copyright (C) 1994-1999 Russell King + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include + +#define UART_SHIFT 2 + +/* Physical addresses */ +#define TEGRA_CLK_RESET_BASE 0x60006000 +#define TEGRA_APB_MISC_BASE 0x70000000 +#define TEGRA_UARTA_BASE 0x70006000 +#define TEGRA_UARTB_BASE 0x70006040 +#define TEGRA_UARTC_BASE 0x70006200 +#define TEGRA_UARTD_BASE 0x70006300 +#define TEGRA_UARTE_BASE 0x70006400 +#define TEGRA_PMC_BASE 0x7000e400 + +#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04) +#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08) +#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c) +#define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10) +#define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14) +#define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18) +#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0) +#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804) + +/* + * Must be 1MB-aligned since a 1MB mapping is used early on. + * Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[]. + */ +#define UART_VIRTUAL_BASE 0xfe100000 + +#define checkuart(rp, rv, lhu, bit, uart) \ + /* Load address of CLK_RST register */ \ + movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \ + movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \ + /* Load value from CLK_RST register */ \ + ldr rp, [rp, #0] ; \ + /* Test UART's reset bit */ \ + tst rp, #(1 << bit) ; \ + /* If set, can't use UART; jump to save no UART */ \ + bne 90f ; \ + /* Load address of CLK_OUT_ENB register */ \ + movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \ + movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \ + /* Load value from CLK_OUT_ENB register */ \ + ldr rp, [rp, #0] ; \ + /* Test UART's clock enable bit */ \ + tst rp, #(1 << bit) ; \ + /* If clear, can't use UART; jump to save no UART */ \ + beq 90f ; \ + /* Passed all tests, load address of UART registers */ \ + movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \ + movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \ + /* Jump to save UART address */ \ + b 91f + + .macro addruart, rp, rv, tmp + adr \rp, 99f @ actual addr of 99f + ldr \rv, [\rp] @ linked addr is stored there + sub \rv, \rv, \rp @ offset between the two + ldr \rp, [\rp, #4] @ linked tegra_uart_config + sub \tmp, \rp, \rv @ actual tegra_uart_config + ldr \rp, [\tmp] @ Load tegra_uart_config + cmp \rp, #1 @ needs initialization? + bne 100f @ no; go load the addresses + mov \rv, #0 @ yes; record init is done + str \rv, [\tmp] + +#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA + /* Check ODMDATA */ +10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff + movt \rp, #TEGRA_PMC_SCRATCH20 >> 16 + ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20 + ubfx \rv, \rp, #18, #2 @ 19:18 are console type + cmp \rv, #2 @ 2 and 3 mean DCC, UART + beq 11f @ some boards swap the meaning + cmp \rv, #3 @ so accept either + bne 90f +11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID + cmp \rv, #0 @ UART 0? + beq 20f + cmp \rv, #1 @ UART 1? + beq 21f + cmp \rv, #2 @ UART 2? + beq 22f + cmp \rv, #3 @ UART 3? + beq 23f + cmp \rv, #4 @ UART 4? + beq 24f + b 90f @ invalid +#endif + +#if defined(CONFIG_TEGRA_DEBUG_UARTA) || \ + defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) + /* Check UART A validity */ +20: checkuart(\rp, \rv, L, 6, A) +#endif + +#if defined(CONFIG_TEGRA_DEBUG_UARTB) || \ + defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) + /* Check UART B validity */ +21: checkuart(\rp, \rv, L, 7, B) +#endif + +#if defined(CONFIG_TEGRA_DEBUG_UARTC) || \ + defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) + /* Check UART C validity */ +22: checkuart(\rp, \rv, H, 23, C) +#endif + +#if defined(CONFIG_TEGRA_DEBUG_UARTD) || \ + defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) + /* Check UART D validity */ +23: checkuart(\rp, \rv, U, 1, D) +#endif + +#if defined(CONFIG_TEGRA_DEBUG_UARTE) || \ + defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) + /* Check UART E validity */ +24: + checkuart(\rp, \rv, U, 2, E) +#endif + + /* No valid UART found */ +90: mov \rp, #0 + /* fall through */ + + /* Record whichever UART we chose */ +91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys + cmp \rp, #0 @ Valid UART address? + bne 92f @ Yes, go process it + str \rp, [\tmp, #8] @ Store 0 in tegra_uart_virt + b 100f @ Done +92: and \rv, \rp, #0xffffff @ offset within 1MB section + add \rv, \rv, #UART_VIRTUAL_BASE + str \rv, [\tmp, #8] @ Store in tegra_uart_virt + movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff + movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16 + ldr \rv, [\rv, #0] @ Load HIDREV + ubfx \rv, \rv, #8, #8 @ 15:8 are SoC version + cmp \rv, #0x20 @ Tegra20? + moveq \rv, #0x75 @ Tegra20 divisor + movne \rv, #0xdd @ Tegra30 divisor + str \rv, [\tmp, #12] @ Save divisor to scratch + /* uart[UART_LCR] = UART_LCR_WLEN8 | UART_LCR_DLAB; */ + mov \rv, #UART_LCR_WLEN8 | UART_LCR_DLAB + str \rv, [\rp, #UART_LCR << UART_SHIFT] + /* uart[UART_DLL] = div & 0xff; */ + ldr \rv, [\tmp, #12] + and \rv, \rv, #0xff + str \rv, [\rp, #UART_DLL << UART_SHIFT] + /* uart[UART_DLM] = div >> 8; */ + ldr \rv, [\tmp, #12] + lsr \rv, \rv, #8 + str \rv, [\rp, #UART_DLM << UART_SHIFT] + /* uart[UART_LCR] = UART_LCR_WLEN8; */ + mov \rv, #UART_LCR_WLEN8 + str \rv, [\rp, #UART_LCR << UART_SHIFT] + b 100f + + .align +99: .word . + .word tegra_uart_config + .ltorg + + /* Load previously selected UART address */ +100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys + ldr \rv, [\tmp, #8] @ Load tegra_uart_virt + .endm + +/* + * Code below is swiped from , but add an extra + * check to make sure that the UART address is actually valid. + */ + + .macro senduart, rd, rx + cmp \rx, #0 + strneb \rd, [\rx, #UART_TX << UART_SHIFT] +1001: + .endm + + .macro busyuart, rd, rx + cmp \rx, #0 + beq 1002f +1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1001b +1002: + .endm + + .macro waituart, rd, rx +#ifdef FLOW_CONTROL + cmp \rx, #0 + beq 1002f +1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT] + tst \rd, #UART_MSR_CTS + beq 1001b +1002: +#endif + .endm -- cgit v1.2.3 From cb84fa18a40fb142d725bf5c7594a0a16cd96289 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Nov 2012 12:40:49 +0100 Subject: ARM: sunxi: Add earlyprintk support Signed-off-by: Maxime Ripard Acked-by: Stefan Roese --- arch/arm/include/debug/sunxi.S | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm/include/debug/sunxi.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/sunxi.S b/arch/arm/include/debug/sunxi.S new file mode 100644 index 00000000000..3bf61ca0df7 --- /dev/null +++ b/arch/arm/include/debug/sunxi.S @@ -0,0 +1,24 @@ +/* + * Early serial output macro for Allwinner A1X SoCs + * + * Copyright (C) 2012 Maxime Ripard + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_DEBUG_SUNXI_UART1 +#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400 +#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400 +#endif + + .macro addruart, rp, rv, tmp + ldr \rp, =SUNXI_UART_DEBUG_PHYS_BASE + ldr \rv, =SUNXI_UART_DEBUG_VIRT_BASE + .endm + +#define UART_SHIFT 2 +#include -- cgit v1.2.3 From aa25115aff14a149a6b611fe54776c142e483781 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Nov 2012 12:09:41 +0100 Subject: ARM: sunxi: Add earlyprintk support for UART0 (sun4i) Signed-off-by: Stefan Roese Acked-by: Arnd Bergmann Signed-off-by: Maxime Ripard --- arch/arm/include/debug/sunxi.S | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/sunxi.S b/arch/arm/include/debug/sunxi.S index 3bf61ca0df7..04eb56d5db2 100644 --- a/arch/arm/include/debug/sunxi.S +++ b/arch/arm/include/debug/sunxi.S @@ -10,7 +10,10 @@ * published by the Free Software Foundation. */ -#ifdef CONFIG_DEBUG_SUNXI_UART1 +#if defined(CONFIG_DEBUG_SUNXI_UART0) +#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28000 +#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28000 +#elif defined(CONFIG_DEBUG_SUNXI_UART1) #define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400 #define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400 #endif -- cgit v1.2.3 From 385f02b1696004461d89589e69ae7247081a74a2 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Mon, 19 Nov 2012 10:16:01 -0600 Subject: ARM: zynq: make use of debug_ll_io_init() Convert low-level debugging routines to make use of debug_ll_io_init(). This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq. Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/include/debug/zynq.S | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/include/debug/zynq.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S new file mode 100644 index 00000000000..08aed97120e --- /dev/null +++ b/arch/arm/include/debug/zynq.S @@ -0,0 +1,35 @@ +/* + * Debugging macro include header + * + * Copyright (C) 2011 Xilinx + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + + .macro addruart, rp, rv, tmp + ldr \rp, =LL_UART_PADDR @ physical + ldr \rv, =LL_UART_VADDR @ virtual + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register + tst \rd, #UART_SR_TXFULL @ + bne 1002b @ wait if FIFO is full + .endm -- cgit v1.2.3 From 9a45eb691d8712b64a733178746557f708043444 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Mon, 19 Nov 2012 11:38:29 -0600 Subject: ARM: zynq: add support for ARCH_MULTIPLATFORM The majority of changes are necessary to remove dependencies on header files within arch/arm/mach-zynq/include/mach: uncompress.h - Deleted. It is unused for ARCH_MULTIPLATFORM builds. uart.h: - Move uart definitions out of uart.h into debug/zynq.S, which is now the only user zynq_soc.h: - Move SCU address definitions into common.c. - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are unused and can be dropped Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/include/debug/zynq.S | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S index 08aed97120e..f9aa9740a73 100644 --- a/arch/arm/include/debug/zynq.S +++ b/arch/arm/include/debug/zynq.S @@ -12,9 +12,25 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ +#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ +#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ -#include -#include +#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ +#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ + +#define UART0_PHYS 0xE0000000 +#define UART1_PHYS 0xE0001000 +#define UART_SIZE SZ_4K +#define UART_VIRT 0xF0001000 + +#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) +# define LL_UART_PADDR UART1_PHYS +#else +# define LL_UART_PADDR UART0_PHYS +#endif + +#define LL_UART_VADDR UART_VIRT .macro addruart, rp, rv, tmp ldr \rp, =LL_UART_PADDR @ physical -- cgit v1.2.3