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-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c12
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h2
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h4
3 files changed, 9 insertions, 9 deletions
diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c
index 21cdb0637be..3bcedce13f4 100644
--- a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c
+++ b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c
@@ -87,7 +87,7 @@
/*
- * For performance reasons, we handle storage endpoint transfers upto 4 KB
+ * For performance reasons, we handle storage endpoint transfers up to 4 KB
* within the HAL itself.
*/
#define CYASSTORAGE_WRITE_EP_NUM (4)
@@ -108,12 +108,12 @@
((ep) == 6) || ((ep) == 8))
/*
- * persistant, stores current GPMC interface cfg mode
+ * persistent, stores current GPMC interface cfg mode
*/
static uint8_t pnand_16bit;
/*
- * keep processing new WB DRQ in ISR untill all handled (performance feature)
+ * keep processing new WB DRQ in ISR until all handled (performance feature)
*/
#define PROCESS_MULTIPLE_DRQ_IN_ISR (1)
@@ -157,7 +157,7 @@ typedef struct cy_as_hal_endpoint_dma {
* dma_xfer_sz - size of the next dma xfer on P port
* seg_xfer_cnt - counts xfered bytes for in current sg_list
* memory segment
- * req_xfer_cnt - total number of bytes transfered so far in
+ * req_xfer_cnt - total number of bytes transferred so far in
* current request
* req_length - total request length
*/
@@ -2160,7 +2160,7 @@ void cy_as_hal_mem_set(void *ptr, uint8_t value, uint32_t cnt)
/*
* This function is expected to create a sleep channel.
* The data structure that represents the sleep channel object
- * sleep channel (which is Linux "wait_queue_head_t wq" for this paticular HAL)
+ * sleep channel (which is Linux "wait_queue_head_t wq" for this particular HAL)
* passed as a pointer, and allpocated by the caller
* (typically as a local var on the stack) "Create" word should read as
* "SleepOn", this func doesn't actually create anything
@@ -2364,7 +2364,7 @@ int start_o_m_a_p_kernel(const char *pgm,
*/
cy_as_hal_gpmc_enable_16bit_bus(cy_true);
#else
- /* Astoria and GPMC are already in 8 bit mode, jsut initialize PNAND_CFG */
+ /* Astoria and GPMC are already in 8 bit mode, just initialize PNAND_CFG */
ast_p_nand_casdi_write(CY_AS_MEM_PNAND_CFG, 0x0000);
#endif
diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h
index 80dd530bc4f..6426ea61f3d 100644
--- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h
+++ b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h
@@ -20,7 +20,7 @@
*/
/*
- * This file contains the defintion of the hardware abstraction
+ * This file contains the definition of the hardware abstraction
* layer on OMAP3430 talking to the West Bridge Astoria device
*/
diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h
index 3eee192ffe8..46f06ee2935 100644
--- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h
+++ b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h
@@ -51,7 +51,7 @@
* GPMC_ADDR
* [A8:A1]->upD[7:0]
* INT# -GPMC_nWP_GPIO_62
- * DACK -N/C not conected
+ * DACK -N/C not connected
* WAKEUP-GPIO_167
* RESET-GPIO_126
* R/B -GPMC_WAIT2_GPIO_64
@@ -108,7 +108,7 @@
* will be monitored
* PF_EN_ENGINE - 1- ENABLES ENGINE, but it needs to be started after
* that C ctrl reg bit 0
- * PF_FIFO_THRESHOLD - FIFO threshhold in number of BUS(8 or 16) words
+ * PF_FIFO_THRESHOLD - FIFO threshold in number of BUS(8 or 16) words
* PF_WEIGHTED_PRIO - NUM of cycles granted to PFE if RND_ROBIN
* prioritization is enabled
* PF_ROUND_ROBIN - if enabled, gives priority to other CS, but