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Diffstat (limited to 'arch/arm/mach-omap2/clock36xx.c')
-rw-r--r--arch/arm/mach-omap2/clock36xx.c24
1 files changed, 10 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25ed887..8f3bf4e5090 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock36xx.h"
@@ -39,34 +37,32 @@
* (Any other value different from the Read value) to the
* corresponding CM_CLKSEL register will refresh the dividers.
*/
-static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
+int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
{
+ struct clk_hw_omap *parent;
+ struct clk_hw *parent_hw;
u32 dummy_v, orig_v, clksel_shift;
int ret;
/* Clear PWRDN bit of HSDIVIDER */
ret = omap2_dflt_clk_enable(clk);
+ parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
+ parent = to_clk_hw_omap(parent_hw);
+
/* Restore the dividers */
if (!ret) {
- clksel_shift = __ffs(clk->parent->clksel_mask);
- orig_v = __raw_readl(clk->parent->clksel_reg);
+ clksel_shift = __ffs(parent->clksel_mask);
+ orig_v = __raw_readl(parent->clksel_reg);
dummy_v = orig_v;
/* Write any other value different from the Read value */
dummy_v ^= (1 << clksel_shift);
- __raw_writel(dummy_v, clk->parent->clksel_reg);
+ __raw_writel(dummy_v, parent->clksel_reg);
/* Write the original divider */
- __raw_writel(orig_v, clk->parent->clksel_reg);
+ __raw_writel(orig_v, parent->clksel_reg);
}
return ret;
}
-
-const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = {
- .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
- .disable = omap2_dflt_clk_disable,
- .find_companion = omap2_clk_dflt_find_companion,
- .find_idlest = omap2_clk_dflt_find_idlest,
-};