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Diffstat (limited to 'arch/arm/mach-davinci/dm644x.c')
-rw-r--r--arch/arm/mach-davinci/dm644x.c28
1 files changed, 6 insertions, 22 deletions
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c8b866657fc..11c79a3362e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -23,12 +23,12 @@
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
-#include <mach/asp.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include "clock.h"
#include "mux.h"
+#include "asp.h"
/*
* Device specific clocks
@@ -701,7 +701,7 @@ static struct resource dm644x_venc_resources[] = {
#define DM644X_VPSS_DACCLKEN BIT(4)
static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
- unsigned int mode)
+ unsigned int pclock)
{
int ret = 0;
u32 v = DM644X_VPSS_VENCLKEN;
@@ -711,27 +711,17 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
v |= DM644X_VPSS_DACCLKEN;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
break;
- case VPBE_ENC_DV_PRESET:
- switch (mode) {
- case V4L2_DV_480P59_94:
- case V4L2_DV_576P50:
- v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
- DM644X_VPSS_DACCLKEN;
+ case VPBE_ENC_CUSTOM_TIMINGS:
+ if (pclock <= 27000000) {
+ v |= DM644X_VPSS_DACCLKEN;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
- break;
- case V4L2_DV_720P60:
- case V4L2_DV_1080I60:
- case V4L2_DV_1080P30:
+ } else {
/*
* For HD, use external clock source since
* HD requires higher clock rate
*/
v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
- break;
- default:
- ret = -EINVAL;
- break;
}
break;
default:
@@ -795,12 +785,6 @@ static struct map_desc dm644x_io_desc[] = {
.length = IO_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(0x00008000),
- .length = SZ_16K,
- .type = MT_MEMORY_NONCACHED,
- },
};
/* Contents of JTAG ID register used to identify exact cpu type */