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-rw-r--r--arch/arm/Kconfig.debug194
1 files changed, 183 insertions, 11 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 01a13414121..661030d6bc6 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -132,6 +132,23 @@ choice
their output to UART1 serial port on DaVinci TNETV107X
devices.
+ config DEBUG_ZYNQ_UART0
+ bool "Kernel low-level debugging on Xilinx Zynq using UART0"
+ depends on ARCH_ZYNQ
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to UART0 on the Zynq platform.
+
+ config DEBUG_ZYNQ_UART1
+ bool "Kernel low-level debugging on Xilinx Zynq using UART1"
+ depends on ARCH_ZYNQ
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to UART1 on the Zynq platform.
+
+ If you have a ZC702 board and want early boot messages to
+ appear on the USB serial adaptor, select this option.
+
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
@@ -209,20 +226,26 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX50 or i.MX53.
- config DEBUG_IMX6Q_UART2
- bool "i.MX6Q Debug UART2"
+ config DEBUG_IMX6Q_UART
+ bool "i.MX6Q Debug UART"
depends on SOC_IMX6Q
help
Say Y here if you want kernel low-level debugging support
- on i.MX6Q UART2. This is correct for e.g. the SabreLite
- board.
+ on i.MX6Q.
- config DEBUG_IMX6Q_UART4
- bool "i.MX6Q Debug UART4"
- depends on SOC_IMX6Q
+ config DEBUG_MMP_UART2
+ bool "Kernel low-level debugging message via MMP UART2"
+ depends on ARCH_MMP
help
Say Y here if you want kernel low-level debugging support
- on i.MX6Q UART4.
+ on MMP UART2.
+
+ config DEBUG_MMP_UART3
+ bool "Kernel low-level debugging message via MMP UART3"
+ depends on ARCH_MMP
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MMP UART3.
config DEBUG_MSM_UART1
bool "Kernel low-level debugging messages via MSM UART1"
@@ -261,6 +284,20 @@ choice
Say Y here if you want the debug print routines to direct
their output to the serial port on MSM 8960 devices.
+ config DEBUG_MVEBU_UART
+ bool "Kernel low-level debugging messages via MVEBU UART"
+ depends on ARCH_MVEBU
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MVEBU based platforms.
+
+ config DEBUG_PICOXCELL_UART
+ depends on ARCH_PICOXCELL
+ bool "Use PicoXcell UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on PicoXcell based platforms.
+
config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART"
depends on ARCH_REALVIEW
@@ -310,8 +347,74 @@ choice
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
+ config DEBUG_S3C_UART3
+ depends on PLAT_SAMSUNG && ARCH_EXYNOS
+ bool "Use S3C UART 3 for low-level debug"
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to UART 3. The port must have been initialised
+ by the boot-loader before use.
+
+ The uncompressor code port configuration is now handled
+ by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+ config DEBUG_SOCFPGA_UART
+ depends on ARCH_SOCFPGA
+ bool "Use SOCFPGA UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on SOCFPGA based platforms.
+
+ config DEBUG_SUNXI_UART0
+ bool "Kernel low-level debugging messages via sunXi UART0"
+ depends on ARCH_SUNXI
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Allwinner A1X based platforms on the UART0.
+
+ config DEBUG_SUNXI_UART1
+ bool "Kernel low-level debugging messages via sunXi UART1"
+ depends on ARCH_SUNXI
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Allwinner A1X based platforms on the UART1.
+
+ config DEBUG_TEGRA_UART
+ depends on ARCH_TEGRA
+ bool "Use Tegra UART for low-level debug"
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Tegra based platforms.
+
+ config DEBUG_VEXPRESS_UART0_DETECT
+ bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
+ depends on ARCH_VEXPRESS && CPU_CP15_MMU
+ help
+ This option enables a simple heuristic which tries to determine
+ the motherboard's memory map variant (original or RS1) and then
+ choose the relevant UART0 base address.
+
+ Note that this will only work with standard A-class core tiles,
+ and may fail with non-standard SMM or custom software models.
+
+ config DEBUG_VEXPRESS_UART0_CA9
+ bool "Use PL011 UART0 at 0x10009000 (V2P-CA9 core tile)"
+ depends on ARCH_VEXPRESS
+ help
+ This option selects UART0 at 0x10009000. Except for custom models,
+ this applies only to the V2P-CA9 tile.
+
+ config DEBUG_VEXPRESS_UART0_RS1
+ bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
+ depends on ARCH_VEXPRESS
+ help
+ This option selects UART0 at 0x1c090000. This applies to most
+ of the tiles using the RS1 memory map, including all new A-class
+ core tiles, FPGA-based SMMs and software models.
+
config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
+ depends on !ARCH_MULTIPLATFORM
help
Say Y here if your platform doesn't provide a UART option
below. This relies on your platform choosing the right UART
@@ -330,15 +433,15 @@ choice
is nothing connected to read from the DCC.
config DEBUG_SEMIHOSTING
- bool "Kernel low-level debug output via semihosting I"
+ bool "Kernel low-level debug output via semihosting I/O"
help
Semihosting enables code running on an ARM target to use
the I/O facilities on a host debugger/emulator through a
- simple SVC calls. The host debugger or emulator must have
+ simple SVC call. The host debugger or emulator must have
semihosting enabled for the special svc call to be trapped
otherwise the kernel will crash.
- This is known to work with OpenOCD, as wellas
+ This is known to work with OpenOCD, as well as
ARM's Fast Models, or any other controlling environment
that implements semihosting.
@@ -347,6 +450,66 @@ choice
endchoice
+config DEBUG_IMX6Q_UART_PORT
+ int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
+ range 1 5
+ default 1
+ depends on SOC_IMX6Q
+ help
+ Choose UART port on which kernel low-level debug messages
+ should be output.
+
+choice
+ prompt "Low-level debug console UART"
+ depends on DEBUG_LL && DEBUG_TEGRA_UART
+
+ config TEGRA_DEBUG_UART_AUTO_ODMDATA
+ bool "Via ODMDATA"
+ help
+ Automatically determines which UART to use for low-level debug based
+ on the ODMDATA value. This value is part of the BCT, and is written
+ to the boot memory device using nvflash, or other flashing tool.
+ When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
+ 0/1/2/3/4 are UART A/B/C/D/E.
+
+ config TEGRA_DEBUG_UARTA
+ bool "UART A"
+
+ config TEGRA_DEBUG_UARTB
+ bool "UART B"
+
+ config TEGRA_DEBUG_UARTC
+ bool "UART C"
+
+ config TEGRA_DEBUG_UARTD
+ bool "UART D"
+
+ config TEGRA_DEBUG_UARTE
+ bool "UART E"
+
+endchoice
+
+config DEBUG_LL_INCLUDE
+ string
+ default "debug/icedcc.S" if DEBUG_ICEDCC
+ default "debug/imx.S" if DEBUG_IMX1_UART || \
+ DEBUG_IMX25_UART || \
+ DEBUG_IMX21_IMX27_UART || \
+ DEBUG_IMX31_IMX35_UART || \
+ DEBUG_IMX51_UART || \
+ DEBUG_IMX50_IMX53_UART ||\
+ DEBUG_IMX6Q_UART
+ default "debug/highbank.S" if DEBUG_HIGHBANK_UART
+ default "debug/mvebu.S" if DEBUG_MVEBU_UART
+ default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
+ default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
+ default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
+ default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
+ DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ default "debug/tegra.S" if DEBUG_TEGRA_UART
+ default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
+ default "mach/debug-macro.S"
+
config EARLY_PRINTK
bool "Early printk"
depends on DEBUG_LL
@@ -369,4 +532,13 @@ config ARM_KPROBES_TEST
help
Perform tests of kprobes API and instruction set simulation.
+config PID_IN_CONTEXTIDR
+ bool "Write the current PID to the CONTEXTIDR register"
+ depends on CPU_COPY_V6
+ help
+ Enabling this option causes the kernel to write the current PID to
+ the PROCID field of the CONTEXTIDR register, at the expense of some
+ additional instructions during context switch. Say Y here only if you
+ are planning to use hardware trace tools with this kernel.
+
endmenu