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Author SHA1 Message Date
Alexander Shiyan 197926108c ARM: clps711x: Add FIQ interrupt handling
CLPS711X-target CPU can have a several FIQ interrupts. With this patch
we adds handling for a one which will be used for ALSA PCM later.
Since FIQ have a separate handler we only add "mask" and "unmask" calls
which will used for enable/disable_irq functions.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21 09:57:42 -08:00
Alexander Shiyan 0d8be81c0e ARM: clps711x: Implement usage "SPARSE_IRQ" kernel option for a platform
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21 09:57:41 -08:00
Alexander Shiyan 36504ac131 ARM: clps711x: added missing definitions
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-10-25 17:22:35 +02:00
Alexander Shiyan afc49177b4 ARM: clps711x: Fix register definitions
This patch contain some fixes:
- Fixes the address of register PORTE.
- Corrects name for DAIDR0 register.
- Removes unused definition for SYNCIO_CFGLEN.
- Fixes definition SYNCIO_FRMLEN.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
2012-09-28 21:14:07 +02:00
Alexander Shiyan b3ff9341ff ARM: clps711x: Added missing register definitions
This allows us to keep everything in a single place.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-14 20:36:46 +02:00
Alexander Shiyan 27723ec4ec ARM: clps711x: Used own subarch directory for store header file
There is no reason to have the clps7111.h header in a globally
visible location, so move it to a place that is only visible when
building for mach-clps711x.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-14 20:35:37 +02:00