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Author SHA1 Message Date
Stef van Os c3745ead19 phy/marvell: remove fiber/copper autoselect on 88e1111
Remove the code that always enables copper/fiber autoselect,
ignoring the DIS_FC strapping pin. The default value for this
register is autoselect on anyway, and if you explicitly disable
autoselect via strapping you probably really don't want
autoselect.

Signed-off-by: Stef van Os <stef.van.os@prodrive.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-17 15:47:24 -05:00
Christian Hohnstaedt d5bf9071e7 phylib: Support registering a bunch of drivers
If registering of one of them fails, all already registered drivers
of this module will be unregistered.

Use the new register/unregister functions in all drivers
registering more than one driver.

amd.c, realtek.c: Simplify: directly return registration result.

Tested with broadcom.c
All others compile-tested.

Signed-off-by: Christian Hohnstaedt <chohnstaedt@innominate.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-09 00:10:56 -07:00
Srinivas Kandagatla cc90cb3b24 net:phy:marvell: remove unnecessary code
Compile tested.
remove unnecessary code that matches this coccinelle pattern

	ret = phy_write(x, y , z)
	if (ret < 0)
	       	return ret;
	return 0;

As phy_write returns error code, we dont need to do not need extra check
before returning.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-03 19:02:00 -04:00
David Daney cf41a51db8 of/phylib: Use device tree properties to initialize Marvell PHYs.
Some aspects of PHY initialization are board dependent, things like
indicator LED connections and some clocking modes cannot be determined
by probing.  The dev_flags element of struct phy_device can be used to
control these things if an appropriate value can be passed from the
Ethernet driver.  We run into problems however if the PHY connections
are specified by the device tree.  There is no way for the Ethernet
driver to know what flags it should pass.

If we are using the device tree, the struct phy_device will be
populated with the device tree node corresponding to the PHY, and we
can extract extra configuration information from there.

The next question is what should the format of that information be?
It is highly device specific, and the device tree representation
should not be tied to any arbitrary kernel defined constants.  A
straight forward representation is just to specify the exact bits that
should be set using the "marvell,reg-init" property:

      phy5: ethernet-phy@5 {
        reg = <5>;
        compatible = "marvell,88e1149r";
        marvell,reg-init =
                /* led[0]:1000, led[1]:100, led[2]:10, led[3]:tx */
                <3 0x10 0 0x5777>, /* Reg 3,16 <- 0x5777 */
                /* mix %:0, led[0123]:drive low off hiZ */
                <3 0x11 0 0x00aa>, /* Reg 3,17 <- 0x00aa */
                /* default blink periods. */
                <3 0x12 0 0x4105>, /* Reg 3,18 <- 0x4105 */
                /* led[4]:rx, led[5]:dplx, led[45]:drive low off hiZ */
                <3 0x13 0 0x0a60>; /* Reg 3,19 <- 0x0a60 */
      };

      phy6: ethernet-phy@6 {
        reg = <6>;
        compatible = "marvell,88e1118";
        marvell,reg-init =
                /* Fix rx and tx clock transition timing */
                <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
                /* Adjust LED drive. */
                <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
                /* irq, blink-activity, blink-link */
                <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
      };

The Marvell PHYs have a page select register at register 22 (0x16), we
can specify any register by its page and register number.  These are
the first and second word.  The third word contains a mask to be ANDed
with the existing register value, and the fourth word is ORed with the
result to yield the new register value.  The new marvell_of_reg_init
function leaves the page select register unchanged, so a call to it
can be dropped into the .config_init functions without unduly
affecting the state of the PHY.

If CONFIG_OF_MDIO is not set, there is no of_node, or no
"marvell,reg-init" property, the PHY initialization is unchanged.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Cyril Chemparathy <cyril@ti.com>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-11-22 08:34:23 -08:00
David Daney 90600732d8 phylib: Add support for Marvell 88E1149R devices.
The 88E1149R is 10/100/1000 quad-gigabit Ethernet PHY.  The
.config_aneg function can be shared with 88E1118, but it needs its own
.config_init.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: Cyril Chemparathy <cyril@ti.com>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-11-22 08:34:23 -08:00
David Daney 27d916d680 phylib: Use common page register definition for Marvell PHYs.
The definition of the Marvell PHY page register is not specific to
88E1121, so rename the macro to MII_MARVELL_PHY_PAGE, and use it
throughout.

Suggested-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: Cyril Chemparathy <cyril@ti.com>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-11-22 08:34:22 -08:00
Cyril Chemparathy 337ac9d521 phy/marvell: rename 88ec048 to 88e1318s and fix mscr1 addr
The marvell 88ec048's official part number is 88e1318s.  This patch renames
definitions in the driver to reflect this.

In addition, a minor bug fix has been added to write back the MSCR1 register
value properly.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-10-29 13:50:25 -07:00
Arnaud Patard be8c648051 phy/marvell: fix 88e1121 support
Commit c477d0447d added support for RGMII
rx/tx delays except that it ends up clearing rx/tx delays bit for modes
differents that RGMII*ID. Due to this, ethernet is not working anymore
on my guruplug server +. This patch is fixing that.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-10-21 03:59:57 -07:00
Uwe Kleine-König cf93c94581 net/phy: fix many "defined but unused" warnings
MODULE_DEVICE_TABLE only expands to something if it's compiled
for a module.  So when building-in support for the phys, the
mdio_device_id tables are unused.  Marking them with __maybe_unused
fixes the following warnings:

	drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used
	drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used
	drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used
	drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used
	drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used
	drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used
	drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used
	drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used
	drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used
	drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used
	drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used
	drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used
	drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used
	drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used
	drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-10-05 00:34:29 -07:00
Linus Torvalds 6ba74014c1 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1443 commits)
  phy/marvell: add 88ec048 support
  igb: Program MDICNFG register prior to PHY init
  e1000e: correct MAC-PHY interconnect register offset for 82579
  hso: Add new product ID
  can: Add driver for esd CAN-USB/2 device
  l2tp: fix export of header file for userspace
  can-raw: Fix skb_orphan_try handling
  Revert "net: remove zap_completion_queue"
  net: cleanup inclusion
  phy/marvell: add 88e1121 interface mode support
  u32: negative offset fix
  net: Fix a typo from "dev" to "ndev"
  igb: Use irq_synchronize per vector when using MSI-X
  ixgbevf: fix null pointer dereference due to filter being set for VLAN 0
  e1000e: Fix irq_synchronize in MSI-X case
  e1000e: register pm_qos request on hardware activation
  ip_fragment: fix subtracting PPPOE_SES_HLEN from mtu twice
  net: Add getsockopt support for TCP thin-streams
  cxgb4: update driver version
  cxgb4: add new PCI IDs
  ...

Manually fix up conflicts in:
 - drivers/net/e1000e/netdev.c: due to pm_qos registration
   infrastructure changes
 - drivers/net/phy/marvell.c: conflict between adding 88ec048 support
   and cleaning up the IDs
 - drivers/net/wireless/ipw2x00/ipw2100.c: trivial ipw2100_pm_qos_req
   conflict (registration change vs marking it static)
2010-08-04 11:47:58 -07:00
Cyril Chemparathy 3ff1c25927 phy/marvell: add 88ec048 support
Marvell 88ec048 is a derivative of its 88e1121r device.  From the programmer's
perspective, the one major difference is the addition of an additional control
bit in Page 2 Register 16 - used to control the padding of odd nibble
preambles.

This patch adds support for this new device, while inheriting as much code as
possible from the existing 88e1121r implementation.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-08-03 19:36:06 -07:00
Cyril Chemparathy c477d0447d phy/marvell: add 88e1121 interface mode support
This patch adds support for RGMII RX/TX delay configuration on marvell 88e1121
and derivatives.  With this patch, PHY_INTERFACE_MODE_RGMII_*ID modes are now
supported on these devices.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-08-02 22:07:45 -07:00
Benjamin Herrenschmidt 2f495c398e net/phy/marvell: Expose IDs and flags in a .h and add dns323 LEDs setup flag
This moves the various known Marvell PHY IDs to include/linux/marvell_phy.h
along with dev_flags definitions for use by the driver.

I then added a flag that changes the PHY init code to setup the LEDs
config to the values needed to operate a dns323 rev C1 NAS.

I moved the existing "resistance" flag to the .h as well, though I've
been unable to find whoever sets this to convert it to use that constant.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2010-07-16 22:01:58 -04:00
David S. Miller 871039f02f Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
	drivers/net/stmmac/stmmac_main.c
	drivers/net/wireless/wl12xx/wl1271_cmd.c
	drivers/net/wireless/wl12xx/wl1271_main.c
	drivers/net/wireless/wl12xx/wl1271_spi.c
	net/core/ethtool.c
	net/mac80211/scan.c
2010-04-11 14:53:53 -07:00
David Woodhouse 4e4f10f649 phylib: Add module table to all existing phy drivers
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-02 14:30:40 -07:00
Tejun Heo 5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Liu Yu-B13201 5f8cbc1322 phy: add RTBI mode for m88e1111
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-21 01:17:56 -08:00
Anton Vorontsov 8ff44985c7 phy/marvell: Make non-aneg speed/duplex forcing work for 88E1111 PHYs
According to specs, when auto-negotiation is disabled, Marvell PHYs need
a software reset after changing speed/duplex forcing bits. Otherwise,
the modified bits have no effect.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-11 12:54:38 -07:00
Haiying Wang 32d0c1e1be net/phy/marvell: update m88e1111 support for SGMII mode
Disable fiber/copper auto selection for Marvell m88e1111 SGMII support.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03 02:52:45 -07:00
Anatolij Gustschin dcd07be3ff phylib: Add interrupt source check function to M88E1121R driver
Add did_interrupt() function to check if a PHY port
really caused an interrupt. This is needed in the case
of shared PHY interrupt pin configuration to stop
interrupt event processing for PHY ports which didn't
cause an interrupt.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-04-13 14:51:25 -07:00
Sergei Poselenov 140bc92903 phylib: Basic support for the M88E1121R Marvell chip
Add support for the Marvell M88E1121R Dual GigE PHY

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-04-13 14:51:22 -07:00
Ron Madrid 605f196efb phy: Add support for Marvell 88E1118 PHY
This patch will add support for the Marvell 88E1118 PHY which supports gigabit ethernet among other things.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-15 14:04:27 -08:00
Wang Jian 7239016d52 net/phy: Fix 88e1111 copper/fiber selection in RGMII mode
MII_M1111_HWCFG_FIBER_COPPER_RES is a bit of MII_M1111_PHY_EXT_SR, not
MII_M1111_PHY_EXT_CR.

Signed-off-by: Wang Jian <lark@linux.net.cn>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-22 17:59:12 -04:00
Wang Jian 9cf8fa4334 net/phy: Fix copper/fiber auto-selection for 88e1111
The 27.15 bit (MII_M1111_HWCFG_FIBER_COPPER_AUTO) is disable bit. When
set to 1, copper/fiber auto selection is disabled. The current code
to enable but actually disable auto selection.

Signed-off-by: Wang Jian <lark@linux.net.cn>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-22 17:58:10 -04:00
Harvey Harrison 5da4e37e59 net: marvell.c fix sparse shadowed variable warning
The other if blocks don't redeclare temp, remove the redeclaration in
the final if() block.

drivers/net/phy/marvell.c:214:7: warning: symbol 'temp' shadows an earlier one
drivers/net/phy/marvell.c:160:6: originally declared here

Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-04-04 17:26:15 -04:00
Jeff Garzik f0c88f9c45 netxen, phy/marvell, skge: minor checkpatch fixes
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-03-25 23:53:24 -04:00
Alexandr Smirnov be937f1f89 Marvell PHY m88e1111 driver fix
Marvell PHY m88e1111 (not sure about other models, but think they too)
works in two modes: fiber and copper. In Marvell PHY driver (that we
have in current community kernels) code supported only copper mode,
and this is not configurable, bits for copper mode are simply written
in registers during PHY initialization.

This patch adds support for both modes.

Signed-off-by: Alexandr Smirnov <asmirnov@ru.mvista.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-25 23:16:52 -04:00
Kim Phillips 9daf5a7695 phylib: marvell: add support for TX-only and RX-only Internal Delay
Previously, Internal Delay specification implied the delay be
applied to both TX and RX.  This patch allows for separate TX/RX-only
internal delay specification.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-01 16:32:30 -05:00
Olof Johansson ac8c635abb phylib: Add ID for Marvell 88E1240
Add PHY IDs for Marvell 88E1240. It seems to have close enough programming
models to 1111/1112 for basic support at least.

Also clean up whitespace in the ID list a bit.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-05 17:58:36 -05:00
Olof Johansson 85cfb53428 phylib: Add Marvell 88E1112 phy id
Add 88E1112 PHY ID to the marvell driver. Seems to do fine with the
88E1111 inits.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 12:41:09 -04:00
Olof Johansson e54792396f phylib: cleanup marvell.c a bit
Simplify the marvell driver init a bit: Make the supported devices an
array instead of explicitly registering each structure. This makes it
considerably easier to add new devices down the road.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 12:41:09 -04:00
Kapil Juneja 4117b5be4b phylib: m88e1111: enable SGMII mode
If connected via SGMII, initialize with SGMII mode configured.

Signed-off-by: Kapil Juneja <Kapil.Juneja@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-08 22:16:38 -04:00
Kim Phillips 895ee682db phylib: add RGMII-ID mode to the Marvell m88e1111 PHY to fix broken ucc_geth
Support for configuring RGMII-ID (RGMII with internal delay) mode on the
88e1111 and 88e1145.  Ucc_geth on MPC8360EMDS(the main user of ucc_geth)
is broken after changed to use phylib.  It is fixed by adding this
internal delay.

Also renamed 88e1111s -> 88e1111 (no references to an 88e1111s part were
found), and fixed some whitespace.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-06-09 18:25:35 -04:00
Andy Fleming 76884679c6 phylib: Add support for Marvell 88e1111S and 88e1145
Changes include:
* New support for 88e1145
* New support for 88e111s
* Fixing 88e1101 driver to not match non-88e1101 PHYs
* Increases in feature support across Marvell PHY product line
* Fixes a bunch of whitespace issues found by Lindent

Signed-off-by: Andrew Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-17 15:16:08 -05:00
Tim Schmielau cd354f1ae7 [PATCH] remove many unneeded #includes of sched.h
After Al Viro (finally) succeeded in removing the sched.h #include in module.h
recently, it makes sense again to remove other superfluous sched.h includes.
There are quite a lot of files which include it but don't actually need
anything defined in there.  Presumably these includes were once needed for
macros that used to live in sched.h, but moved to other header files in the
course of cleaning it up.

To ease the pain, this time I did not fiddle with any header files and only
removed #includes from .c-files, which tend to cause less trouble.

Compile tested against 2.6.20-rc2 and 2.6.20-rc2-mm2 (with offsets) on alpha,
arm, i386, ia64, mips, powerpc, and x86_64 with allnoconfig, defconfig,
allmodconfig, and allyesconfig as well as a few randconfigs on x86_64 and all
configs in arch/arm/configs on arm.  I also checked that no new warnings were
introduced by the patch (actually, some warnings are removed that were emitted
by unnecessarily included header files).

Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-14 08:09:54 -08:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Jeff Garzik a10b5aacea Remove linux/version.h include from drivers/net/phy/* and net/ieee80211/*.
Unused, and causes the files to be needlessly rebuilt in some cases.
2005-11-05 23:39:54 -05:00
Andy Fleming 00db8189d9 This patch adds a PHY Abstraction Layer to the Linux Kernel, enabling
ethernet drivers to remain as ignorant as is reasonable of the connected
PHY's design and operation details.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-07-30 19:31:23 -04:00