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authorArvind R <arvino55@gmail.com>2011-01-25 22:38:27 +0530
committerJiri Kosina <jkosina@suse.cz>2011-02-17 16:44:45 +0100
commit7ba9957581a889ce19919a0cdc1cef9f04e5e3a8 (patch)
treeff10350cf36aaa5a1a3ade9746c671c39694a8d6 /drivers
parentb0a4bb830e099a31bec79452268639a7d8c2c1e4 (diff)
edac: correct commented info
wrong comments in i82975x driver corrected Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/edac/i82975x_edac.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
index 5e3acb4eecc..8ec4e9eef72 100644
--- a/drivers/edac/i82975x_edac.c
+++ b/drivers/edac/i82975x_edac.c
@@ -160,8 +160,8 @@ NOTE: Only ONE of the three must be enabled
* 3:2 Rank 1 architecture
* 1:0 Rank 0 architecture
*
- * 00 => x16 devices; i.e 4 banks
- * 01 => x8 devices; i.e 8 banks
+ * 00 => 4 banks
+ * 01 => 8 banks
*/
#define I82975X_C0BNKARC 0x10e
#define I82975X_C1BNKARC 0x18e
@@ -344,11 +344,7 @@ static int dual_channel_active(void __iomem *mch_window)
static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank)
{
/*
- * ASUS P5W DH either does not program this register or programs
- * it wrong!
- * ECC is possible on i92975x ONLY with DEV_X8 which should mean 'val'
- * for each rank should be 01b - the LSB of the word should be 0x55;
- * but it reads 0!
+ * ECC is possible on i92975x ONLY with DEV_X8
*/
return DEV_X8;
}