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authorDon Skidmore <donald.c.skidmore@intel.com>2011-04-26 08:00:00 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-05-04 12:18:22 -0700
commit6716344c521bb585c1b89987c918d4b83b81adbe (patch)
treed30bc78436062a98abfa16c1032c737db883aec9 /drivers/net/ixgbe/ixgbe_main.c
parent68c7005d664724eab87627b042e149a736622d54 (diff)
ixgbe: Cleanup PCIe bus speed info
PCIe connections should be expressed as GT/s (GigaTransfers per second) instead of the current Gb/s (Gigabits per second). In addition, it is incorrect because (due to PCIe gen 1 & 2 having a 20% overhead) the actually data rate, when expressed in Gb/s, is only 80% of the rate of GT/s. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index bd3d21d0185..eebb1921c66 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -7469,8 +7469,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
/* print bus type/speed/width info */
e_dev_info("(PCI Express:%s:%s) %pM\n",
- (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0Gb/s" :
- hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5Gb/s" :
+ (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
+ hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
"Unknown"),
(hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :