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ath9k_hw: Enable TX IQ calibration on AR9003 

To enable it we now disable and re-enable the PHY chips
after TX IQ calibration.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez 2010-05-19 16:45:50 -04:00 committed by John W. Linville
parent 252aa631f8
commit c5395b6743
3 changed files with 6 additions and 11 deletions
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10
drivers/net/wireless/ath/ath9k/ar9003_calib.c
View File

@ -739,6 +739,12 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
*/
ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
/* Do Tx IQ Calibration */
ar9003_hw_tx_iq_cal(ah);
REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
udelay(5);
REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
/* Calibrate the AGC */
REG_WRITE(ah, AR_PHY_AGC_CONTROL,
REG_READ(ah, AR_PHY_AGC_CONTROL) |
@ -753,10 +759,6 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
return false;
}
/* Do Tx IQ Calibration */
if (ah->config.tx_iq_calibration)
ar9003_hw_tx_iq_cal(ah);
/* Revert chainmasks to their original values before NF cal */
ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);

6
drivers/net/wireless/ath/ath9k/hw.c
View File

@ -391,12 +391,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
ah->config.rx_intr_mitigation = true;
/*
* Tx IQ Calibration (ah->config.tx_iq_calibration) is only
* used by AR9003, but it is showing reliability issues.
* It will take a while to fix so this is currently disabled.
*/
/*
* We need this for PCI devices only (Cardbus, PCI, miniPCI)
* _and_ if on non-uniprocessor systems (Multiprocessor/HT).

1
drivers/net/wireless/ath/ath9k/hw.h
View File

@ -263,7 +263,6 @@ struct ath9k_ops_config {
#define AR_BASE_FREQ_5GHZ 4900
#define AR_SPUR_FEEQ_BOUND_HT40 19
#define AR_SPUR_FEEQ_BOUND_HT20 10
bool tx_iq_calibration; /* Only available for >= AR9003 */
int spurmode;
u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
u8 max_txtrig_level;