aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2009-10-12 22:54:47 +0200
committerRalf Baechle <ralf@linux-mips.org>2009-11-02 12:00:04 +0100
commita951f2829adba3f2945172b740528fce4366907d (patch)
treea36449474bb1524bedbd1cc684cec7c474982bde /arch/mips
parentc70887555143fdede9595df4c7a598676922f107 (diff)
MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
Based on original patch by Chris Dearman <chris@mips.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mti-malta/malta-pci.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index b9743190609..efdb4f66ffc 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -241,3 +241,16 @@ void __init mips_pcibios_init(void)
register_pci_controller(controller);
}
+
+/* Enable PCI 2.1 compatibility in PIIX4 */
+static void __init quirk_dlcsetup(struct pci_dev *dev)
+{
+ u8 odlc, ndlc;
+ (void) pci_read_config_byte(dev, 0x82, &odlc);
+ /* Enable passive releases and delayed transaction */
+ ndlc = odlc | 7;
+ (void) pci_write_config_byte(dev, 0x82, ndlc);
+}
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
+ quirk_dlcsetup);