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authorRalf Baechle <ralf@linux-mips.org>2012-08-20 16:25:14 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-10-11 11:10:43 +0200
commit475032564ed96c94c085e3e7a90e07d150a7cec9 (patch)
tree36b66d585f6aef09205fb0ef525e781fa55f0b07 /arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
parentee80f7c73dc1b1f0ba9f82079c9bd1c0d1aedef8 (diff)
MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.
Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h')
-rw-r--r--arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
index b3314cf5319..babc8374e37 100644
--- a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
@@ -45,6 +45,7 @@
#define cpu_has_ic_fills_f_dc 0
#define cpu_icache_snoops_remote_store 0
#define cpu_has_dsp 0
+#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0