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authorKukjin Kim <kgene.kim@samsung.com>2010-10-25 15:57:16 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-25 15:57:16 +0900
commit4d9374f39e40f7c7fc15acbfe01dceeee850509f (patch)
tree31ec5c2ae0ae753a7bdb5a34f3a607fdda2db6c6 /arch/arm/plat-samsung/include/plat/gpio-cfg.h
parentdc6c0ca39daad44f3169656296ef81d39a6dc7f5 (diff)
parentdff2126c548d54b040997257407a69a6cdf7a5b6 (diff)
Merge branch 'next-gpio-update' into for-next
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-cfg.h')
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 5b43b95da68..e4b5cf126fa 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -108,6 +108,19 @@ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
*/
extern unsigned s3c_gpio_getcfg(unsigned int pin);
+/**
+ * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
+ * @start: The pin number to start at
+ * @nr: The number of pins to configure from @start.
+ * @cfg: The configuration for the pin's function
+ *
+ * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
+ *
+ * @sa s3c_gpio_cfgpin.
+ */
+extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
+ unsigned int cfg);
+
/* Define values for the pull-{up,down} available for each gpio pin.
*
* These values control the state of the weak pull-{up,down} resistors
@@ -140,6 +153,31 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
*/
extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
+/* configure `all` aspects of an gpio */
+
+/**
+ * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
+ * @start: The gpio number to start at.
+ * @nr: The number of gpio to configure from @start.
+ * @cfg: The configuration to use
+ * @pull: The pull setting to use.
+ *
+ * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
+ * @gpio and running for @size.
+ *
+ * @sa s3c_gpio_cfgpin
+ * @sa s3c_gpio_setpull
+ * @sa s3c_gpio_cfgpin_range
+ */
+extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
+ unsigned int cfg, s3c_gpio_pull_t pull);
+
+static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
+ unsigned int cfg)
+{
+ return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
+}
+
/* Define values for the drvstr available for each gpio pin.
*
* These values control the value of the output signal driver strength,