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authorNishanth Menon <nm@ti.com>2011-02-14 12:41:10 +0530
committerKevin Hilman <khilman@ti.com>2011-06-20 14:12:31 -0700
commit1279ba5916f6635610c639186be84afaef831fb3 (patch)
tree92d2360f682fe73090b6bb60ebbaabd21927580b /arch/arm/mach-omap2/smartreflex.c
parent7a89afa8cfb2cb614d0b8912f19ee98124feeb51 (diff)
OMAP3+: SR: disable interrupt by default
We will enable and disable interrupt on a need basis in the class driver. We need to keep the IRQ disabled by default else the forceupdate or vcbypass events could trigger events that we don't need/expect to handle. This is a preparation for SmartReflex AVS class drivers such as class 2 and class 1.5 which would need to use interrupts. Existing SmartReflex AVS class 3 driver does not require to use interrupts and is not impacted by this change. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/smartreflex.c')
-rw-r--r--arch/arm/mach-omap2/smartreflex.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 3ee72614321..616ef62b3fa 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info)
0, name, (void *)sr_info);
if (ret)
goto error;
+ disable_irq(sr_info->irq);
}
if (pdata && pdata->enable_on_init)