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authorVivek Kutal <vivek.kutal@celunite.com>2007-12-17 01:56:33 -0800
committerTony Lindgren <tony@atomide.com>2008-02-08 10:38:01 -0800
commitfeb72f3b313e1f068b707773e9231af4f87d9580 (patch)
treeaeab0d27b1665d420457369e35fa1e38a1186693 /arch/arm/mach-omap1/sleep.S
parent010bb0cf42fe2fa0a00753e0c11a3e8bfefb37a3 (diff)
ARM: OMAP1: Remove omap_sram_idle()
This patch removes omap_sram_idle() that is no longer used. The function called in pm_idle is omap_sram_suspend, omap_sram_idle() is not used anywhere in omap1. Signed-off-by: Vivek Kutal <vivek.kutal@celunite.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/sleep.S')
-rw-r--r--arch/arm/mach-omap1/sleep.S161
1 files changed, 0 insertions, 161 deletions
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index abef33d10f0..68f5b39030b 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -39,167 +39,6 @@
.text
-/*
- * Forces OMAP into idle state
- *
- * omapXXXX_idle_loop_suspend()
- *
- * Note: This code get's copied to internal SRAM at boot. When the OMAP
- * wakes up it continues execution at the point it went to sleep.
- *
- * Note: Because of slightly different configuration values we have
- * processor specific functions here.
- */
-
-#if defined(CONFIG_ARCH_OMAP730)
-ENTRY(omap730_idle_loop_suspend)
-
- stmfd sp!, {r0 - r12, lr} @ save registers on stack
-
- @ load base address of ARM_IDLECT1 and ARM_IDLECT2
- mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
-
- @ turn off clock domains
- @ get ARM_IDLECT2 into r2
- ldrh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- mov r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff
- orr r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00
- strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
-
- @ request ARM idle
- @ get ARM_IDLECT1 into r1
- ldrh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
- orr r3, r1, #OMAP730_IDLE_LOOP_REQUEST & 0xffff
- strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- mov r5, #IDLE_WAIT_CYCLES & 0xff
- orr r5, r5, #IDLE_WAIT_CYCLES & 0xff00
-l_730: subs r5, r5, #1
- bne l_730
-/*
- * Let's wait for the next clock tick to wake us up.
- */
- mov r0, #0
- mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
-/*
- * omap730_idle_loop_suspend()'s resume point.
- *
- * It will just start executing here, so we'll restore stuff from the
- * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
- */
-
- @ restore ARM_IDLECT1 and ARM_IDLECT2 and return
- @ r1 has ARM_IDLECT1 and r2 still has ARM_IDLECT2
- strh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- strh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- ldmfd sp!, {r0 - r12, pc} @ restore regs and return
-
-ENTRY(omap730_idle_loop_suspend_sz)
- .word . - omap730_idle_loop_suspend
-#endif /* CONFIG_ARCH_OMAP730 */
-
-#ifdef CONFIG_ARCH_OMAP15XX
-ENTRY(omap1510_idle_loop_suspend)
-
- stmfd sp!, {r0 - r12, lr} @ save registers on stack
-
- @ load base address of ARM_IDLECT1 and ARM_IDLECT2
- mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
-
- @ turn off clock domains
- @ get ARM_IDLECT2 into r2
- ldrh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- mov r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff
- orr r5, r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff00
- strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
-
- @ request ARM idle
- @ get ARM_IDLECT1 into r1
- ldrh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
- orr r3, r1, #OMAP1510_IDLE_LOOP_REQUEST & 0xffff
- strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- mov r5, #IDLE_WAIT_CYCLES & 0xff
- orr r5, r5, #IDLE_WAIT_CYCLES & 0xff00
-l_1510: subs r5, r5, #1
- bne l_1510
-/*
- * Let's wait for the next clock tick to wake us up.
- */
- mov r0, #0
- mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
-/*
- * omap1510_idle_loop_suspend()'s resume point.
- *
- * It will just start executing here, so we'll restore stuff from the
- * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
- */
-
- @ restore ARM_IDLECT1 and ARM_IDLECT2 and return
- @ r1 has ARM_IDLECT1 and r2 still has ARM_IDLECT2
- strh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- strh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- ldmfd sp!, {r0 - r12, pc} @ restore regs and return
-
-ENTRY(omap1510_idle_loop_suspend_sz)
- .word . - omap1510_idle_loop_suspend
-#endif /* CONFIG_ARCH_OMAP15XX */
-
-#if defined(CONFIG_ARCH_OMAP16XX)
-ENTRY(omap1610_idle_loop_suspend)
-
- stmfd sp!, {r0 - r12, lr} @ save registers on stack
-
- @ load base address of ARM_IDLECT1 and ARM_IDLECT2
- mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
-
- @ turn off clock domains
- @ get ARM_IDLECT2 into r2
- ldrh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- mov r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff
- orr r5, r5, #OMAP1610_IDLECT2_SLEEP_VAL & 0xff00
- strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
-
- @ request ARM idle
- @ get ARM_IDLECT1 into r1
- ldrh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
- orr r3, r1, #OMAP1610_IDLE_LOOP_REQUEST & 0xffff
- strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- mov r5, #IDLE_WAIT_CYCLES & 0xff
- orr r5, r5, #IDLE_WAIT_CYCLES & 0xff00
-l_1610: subs r5, r5, #1
- bne l_1610
-/*
- * Let's wait for the next clock tick to wake us up.
- */
- mov r0, #0
- mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
-/*
- * omap1610_idle_loop_suspend()'s resume point.
- *
- * It will just start executing here, so we'll restore stuff from the
- * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
- */
-
- @ restore ARM_IDLECT1 and ARM_IDLECT2 and return
- @ r1 has ARM_IDLECT1 and r2 still has ARM_IDLECT2
- strh r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- strh r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- ldmfd sp!, {r0 - r12, pc} @ restore regs and return
-
-ENTRY(omap1610_idle_loop_suspend_sz)
- .word . - omap1610_idle_loop_suspend
-#endif /* CONFIG_ARCH_OMAP16XX */
/*
* Forces OMAP into deep sleep state