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authorMark A. Greer <mgreer@mvista.com>2009-04-15 12:39:48 -0700
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-26 08:17:16 -0700
commit0e585952ac6a06b3c77d6b8eadb9c359766a700d (patch)
treed8216964e80d9cd3d86b5aa9cb25f035efa26bef /arch/arm/mach-davinci/dm644x.c
parentd81d188cafecbc9e01df51527ac4c84a5b19e033 (diff)
davinci: Move pinmux setup info to SoC infrastructure
The pinmux register base and setup can be different for different SoCs so move the pinmux reg base, pinmux table (and its size) to the SoC infrastructure. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm644x.c')
-rw-r--r--arch/arm/mach-davinci/dm644x.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 7b15faba56e..b7c17dd6795 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -346,6 +346,7 @@ static struct platform_device dm644x_emac_device = {
* reg offset mask mode
*/
static const struct mux_config dm644x_pins[] = {
+#ifdef CONFIG_DAVINCI_MUX
MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true)
MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true)
MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
@@ -386,6 +387,7 @@ MUX_CFG(DM644X, RGB666, 0, 22, 1, 1, true)
MUX_CFG(DM644X, LOEEN, 0, 24, 1, 1, true)
MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false)
+#endif
};
/*----------------------------------------------------------------------*/
@@ -498,12 +500,14 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.cpu_clks = dm644x_clks,
.psc_bases = dm644x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
+ .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
+ .pinmux_pins = dm644x_pins,
+ .pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
};
void __init dm644x_init(void)
{
davinci_common_init(&davinci_soc_info_dm644x);
- davinci_mux_register(dm644x_pins, ARRAY_SIZE(dm644x_pins));
}
static int __init dm644x_init_devices(void)