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authorAlexander Shiyan <shc_work@mail.ru>2012-10-10 19:45:29 +0400
committerArnd Bergmann <arnd@arndb.de>2012-10-25 17:22:34 +0200
commit74fde6de4f33e6d6bc3120ad517b8a4e4eae1851 (patch)
tree199f44057c02740360a2f97d195cc882167f9e9f /arch/arm/mach-clps711x/include/mach
parent66e972b4bd98cdf82ad6d04051a5f508ad73a8dd (diff)
ARM: clps711x: rework IRQ sybsustem initialization
Reworked IRQ subsystem to be able to use some interrupts with "End of interrupt" handler. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-clps711x/include/mach')
-rw-r--r--arch/arm/mach-clps711x/include/mach/irqs.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h
index 14d215f8ca8..1ea56db2fd5 100644
--- a/arch/arm/mach-clps711x/include/mach/irqs.h
+++ b/arch/arm/mach-clps711x/include/mach/irqs.h
@@ -34,8 +34,6 @@
#define IRQ_UMSINT 14
#define IRQ_SSEOTI 15
-#define INT1_IRQS (0x0000fff0)
-
/*
* Interrupts from INTSR2
*/
@@ -45,6 +43,4 @@
#define IRQ_UTXINT2 (16+12) /* bit 12 */
#define IRQ_URXINT2 (16+13) /* bit 13 */
-#define INT2_IRQS (0x30070000)
-
#define NR_IRQS 30