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authorFabio Estevam <fabio.estevam@freescale.com>2012-11-21 17:19:38 -0200
committerSascha Hauer <s.hauer@pengutronix.de>2012-12-17 10:49:41 +0100
commit3e24b05ba3be5281c3fbf0b126953f5810f9d8ab (patch)
tree4ea3b76918e920a6ab1c379eac8a9442e81f184b /arch/arm/boot/dts/imx27-phytec-phycore.dts
parenta4f1de176614f634c367e5994a7bcc428c940df0 (diff)
ARM: dts: mx27: Fix the AIPI bus for FEC
FEC controller is connected to AIPI2 bus. Also fix the AIPI1 address range. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycore.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore.dts13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
index af50469e34b..53b0ec0c228 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -21,8 +21,7 @@
};
soc {
- aipi@10000000 { /* aipi */
-
+ aipi@10000000 { /* aipi1 */
serial@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
@@ -38,10 +37,6 @@
status = "okay";
};
- ethernet@1002b000 {
- status = "okay";
- };
-
i2c@1001d000 {
clock-frequency = <400000>;
status = "okay";
@@ -60,6 +55,12 @@
};
};
};
+
+ aipi@10020000 { /* aipi2 */
+ ethernet@1002b000 {
+ status = "okay";
+ };
+ };
};
nor_flash@c0000000 {