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dect: coa: optimize per-slot memory layout 

- merge DCS state and DCS IV/Key space: the IV and key are reinialized
  on every slot, so we can re-use their space for the DCS state at the
  end of the slot.

- pack radio configuration and BMC control data and move adjacent to
  the DCS space.

This results in 87 bytes of free space for the B-Field data.

Signed-off-by: Patrick McHardy <kaber@trash.net>
This commit is contained in:
Patrick McHardy 2011-04-20 02:15:33 +02:00
parent e783777ac8
commit a5bec753cc
4 changed files with 18 additions and 18 deletions
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8
drivers/dect/coa/sc1442x.c
View File

@ -62,10 +62,10 @@
* 0x06 - 0x0d: A-Field A-Field
* 0x0e - 0x35: B-Field B-Field
*
* 0x3a - 0x3e: Radio Cfg Radio Cfg
* 0x40 - 0x47: BMC Ctrl BMC Ctrl
* 0x50 - 0x5f: DCS IV/Key DCS IV/Key
* 0x70 - 0x7b: DCS state DCS state
* 0x65 - 0x68: Radio Cfg Radio Cfg
* 0x69 - 0x6f: BMC Ctrl BMC Ctrl
* 0x70 - 0x7f: DCS IV/Key DCS IV/Key
* 0x70 - 0x7a: DCS state DCS state
*/
#define SC1442X_DIPSTOPPED 0x80

6
drivers/dect/coa/sc1442x_firmware.asm
View File

@ -38,17 +38,17 @@ BANK7_HIGH EQU 0xf0
DIP_CC_INIT EQU 0x10
; Radio configuration word
RF_DESC EQU 0x3a
RF_DESC EQU 0x65
; BMC control information
BMC_CTRL_SIZE EQU 7
BMC_CTRL EQU 0x40
BMC_CTRL EQU 0x69
; (multi) frame number for scambler and DCS
BMC_CTRL_MFR_OFF EQU 6
; Cipher IV/Key
DCS_DESC EQU 0x50
DCS_DESC EQU 0x70
DCS_IV EQU DCS_DESC
DCS_CK EQU DCS_DESC + 0x8

14
drivers/dect/coa/sc1442x_firmware.c
View File

@ -33,20 +33,20 @@ const unsigned char sc1442x_firmware[] = {
0x02, 0xa8, 0x01, 0x67, 0x39, 0x00, 0x09, 0x06,
0x20, 0x00, 0xec, 0x50, 0x09, 0x05, 0x08, 0x01,
0x04, 0x00, 0x39, 0x00, 0x09, 0x06, 0x20, 0x00,
0xec, 0x50, 0x04, 0x00, 0x20, 0x00, 0x33, 0x40,
0xec, 0x50, 0x04, 0x00, 0x20, 0x00, 0x33, 0x69,
0x09, 0x08, 0xed, 0x40, 0xec, 0x01, 0x09, 0x19,
0x08, 0x01, 0x09, 0x08, 0x27, 0x00, 0xea, 0x20,
0xed, 0x02, 0x09, 0x05, 0x29, 0x00, 0x2c, 0x00,
0x09, 0x0c, 0xec, 0x02, 0x09, 0x20, 0xea, 0x00,
0x3f, 0x06, 0x09, 0x3e, 0x04, 0x00, 0x20, 0x00,
0x33, 0x40, 0x09, 0x08, 0xed, 0x40, 0xec, 0x01,
0x33, 0x69, 0x09, 0x08, 0xed, 0x40, 0xec, 0x01,
0x09, 0x19, 0x08, 0x01, 0x09, 0x08, 0x27, 0x00,
0xea, 0x20, 0xed, 0x02, 0x09, 0x05, 0x29, 0x00,
0x2c, 0x00, 0x09, 0x0c, 0xec, 0x02, 0x09, 0x20,
0xea, 0x00, 0x3f, 0x06, 0x09, 0x3d, 0x04, 0x00,
0x09, 0xf9, 0x09, 0x4f, 0xed, 0x01, 0xec, 0x40,
0x01, 0xd4, 0xed, 0x00, 0x09, 0x28, 0x20, 0x00,
0x33, 0x40, 0x08, 0x01, 0x31, 0x00, 0x09, 0x01,
0x33, 0x69, 0x08, 0x01, 0x31, 0x00, 0x09, 0x01,
0xed, 0x10, 0x09, 0x25, 0x37, 0x06, 0x09, 0x3e,
0x04, 0x00, 0x09, 0xf9, 0x09, 0x54, 0x20, 0x00,
0xec, 0x10, 0x09, 0x08, 0xec, 0x00, 0x01, 0xd4,
@ -54,11 +54,11 @@ const unsigned char sc1442x_firmware[] = {
0x04, 0x00, 0x09, 0x3d, 0x02, 0xac, 0x02, 0xac,
0x02, 0xac, 0x09, 0x01, 0x27, 0x00, 0x09, 0x0b,
0x04, 0x00, 0x0b, 0x00, 0x09, 0x02, 0xa4, 0x00,
0xb9, 0x3a, 0x09, 0x19, 0xa9, 0x00, 0xa5, 0x00,
0xa4, 0x00, 0xb9, 0x3d, 0x09, 0x0a, 0xa9, 0x00,
0xb9, 0x65, 0x09, 0x19, 0xa9, 0x00, 0xa5, 0x00,
0xa4, 0x00, 0xb9, 0x68, 0x09, 0x0a, 0xa9, 0x00,
0xa5, 0x00, 0xec, 0x20, 0x09, 0x0a, 0xa7, 0x00,
0x09, 0xb6, 0xa6, 0x00, 0x09, 0x10, 0x04, 0x00,
0x40, 0x00, 0x50, 0x50, 0x09, 0x10, 0x50, 0x00,
0x40, 0x00, 0x50, 0x70, 0x09, 0x10, 0x50, 0x00,
0x44, 0x00, 0x09, 0x27, 0x44, 0x00, 0x04, 0x00,
0x5f, 0x70, 0x09, 0x0b, 0x5f, 0x00, 0x40, 0x00,
0x04, 0x00, 0x40, 0x00, 0x57, 0x70, 0x09, 0x0b,
@ -68,6 +68,6 @@ const unsigned char sc1442x_firmware[] = {
0x03, 0xed, 0x20, 0x00, 0x6b, 0x00, 0x08, 0x17,
0x01, 0xdf, 0x08, 0x17, 0xea, 0x00, 0x02, 0x38,
0x61, 0x00, 0x08, 0x16, 0x01, 0xdf, 0x0f, 0x00,
0xfa, 0x10, 0x09, 0x0a, 0x33, 0x40, 0x09, 0x08,
0xfa, 0x10, 0x09, 0x0a, 0x33, 0x69, 0x09, 0x08,
0x20, 0x00, 0x09, 0x0a, 0xe9, 0x00, 0xe8, 0x04,
0x62, 0x00, 0x0b, 0x00, 0x01, 0xde};

8
drivers/dect/coa/sc1442x_firmware.h
View File

@ -4,8 +4,8 @@
extern const unsigned char sc1442x_firmware[510];
#define DIP_CC_INIT 0x10
#define RF_DESC 0x3A
#define BMC_CTRL 0x40
#define RF_DESC 0x65
#define BMC_CTRL 0x69
#define BMC_CTRL_MFR_OFF 0x6
#define SD_RSSI_OFF 0x0
#define SD_CSUM_OFF 0x1
@ -58,8 +58,8 @@ extern const unsigned char sc1442x_firmware[510];
#define TX_P32U 0x51
#define TX_P32P 0x55
#define TX_P32U_Enc 0x50
#define DCS_IV 0x50
#define DCS_CK 0x58
#define DCS_IV 0x70
#define DCS_CK 0x78
#define DCS_STATE 0x70
#define DCS_STATE_SIZE 0xB
#define LoadEncKey 0xCC