path: root/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
diff options
authorHebbar, Gururaja <gururaja.hebbar@ti.com>2012-11-19 21:59:58 +0530
committerChris Ball <cjb@laptop.org>2012-12-06 13:54:56 -0500
commitcd587096c0e2b85a67e77721a753679bac89b394 (patch)
tree22ae2292f85cb8d36530535bc087bacdb8889158 /Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
parentdc7745bd32272a614a6598c05db4510548ef18f2 (diff)
mmc: omap_hsmmc: Enable HSPE bit for high speed cards
HSMMC IP on AM33xx need a special setting to handle High-speed cards. Other platforms like TI81xx, OMAP4 may need this as-well. This depends on the HSMMC IP timing closure done for the high speed cards. From AM335x TRM (SPRUH73F - 18.3.12 Output Signals Generation): The MMC/SD/SDIO output signals can be driven on either falling edge or rising edge depending on the SD_HCTL[2] HSPE bit. This feature allows to reach better timing performance, and thus to increase data transfer frequency. There are few pre-requisites for enabling the HSPE bit - Controller should support High-Speed-Enable Bit and - Controller should not be using DDR Mode and - Controller should advertise that it supports High Speed in capabilities register and - MMC/SD clock coming out of controller > 25MHz Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Venkatraman S <svenkatr@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt')
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index be76a23b34c..ed271fc255b 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -19,6 +19,7 @@ ti,dual-volt: boolean, supports dual voltage cards
"supply-name" examples are "vmmc", "vmmc_aux" etc
ti,non-removable: non-removable slot (like eMMC)
ti,needs-special-reset: Requires a special softreset sequence
+ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
mmc1: mmc@0x4809c000 {