path: root/Documentation/arm/Samsung-S3C24XX/Suspend.txt
diff options
authorBen Dooks <ben-linux@fluff.org>2007-02-28 00:16:26 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-03-02 11:58:58 +0000
commit540988eb67f2eee80d0e44bf5f606e388b80500e (patch)
tree0065a43f9c83a0a1b33d0ecb3e79f556b7a0a4bc /Documentation/arm/Samsung-S3C24XX/Suspend.txt
parent1b7b56982fdcd9d85effd76f3928cf5d6eb26155 (diff)
[ARM] 4238/1: S3C24XX: docs: update suspend and resume
Remove some of the explicit use of S3C2410 where it is generic to all the S3C24XX series. Add more info on the CRC code, and add an example of using IRQ_EINT0 to resume from suspend Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation/arm/Samsung-S3C24XX/Suspend.txt')
1 files changed, 33 insertions, 2 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/Suspend.txt b/Documentation/arm/Samsung-S3C24XX/Suspend.txt
index e12bc3284a2..0dab6e32c13 100644
--- a/Documentation/arm/Samsung-S3C24XX/Suspend.txt
+++ b/Documentation/arm/Samsung-S3C24XX/Suspend.txt
@@ -5,10 +5,10 @@
- The S3C2410 supports a low-power suspend mode, where the SDRAM is kept
+ The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
in Self-Refresh mode, and all but the essential peripheral blocks are
powered down. For more information on how this works, please look
- at the S3C2410 datasheets from Samsung.
+ at the relevant CPU datasheet from Samsung.
@@ -56,6 +56,27 @@ Machine Support
Note, the original method of adding an late_initcall() is wrong,
and will end up initialising all compiled machines' pm init!
+ The following is an example of code used for testing wakeup from
+ an falling edge on IRQ_EINT0:
+static irqreturn_t button_irq(int irq, void *pw)
+ return IRQ_HANDLED;
+statuc void __init machine_init(void)
+ ...
+ request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
+ "button-irq-eint0", NULL);
+ enable_irq_wake(IRQ_EINT0);
+ s3c2410_pm_init();
@@ -70,6 +91,12 @@ Debugging
care should be taken that any external clock sources that the UARTs
rely on are still enabled at that point.
+ 3) If any debugging is placed in the resume path, then it must have the
+ relevant clocks and peripherals setup before use (ie, bootloader).
+ For example, if you transmit a character from the UART, the baud
+ rate and uart controls must be setup beforehand.
@@ -89,6 +116,10 @@ Configuration
Allows the entire memory to be checksummed before and after the
suspend to see if there has been any corruption of the contents.
+ Note, the time to calculate the CRC is dependant on the CPU speed
+ and the size of memory. For an 64Mbyte RAM area on an 200MHz
+ S3C2410, this can take approximately 4 seconds to complete.
This support requires the CRC32 function to be enabled.