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tools/power/x86/turbostat: share kernel MSR #defines 

Now that turbostat is built in the kernel tree,
it can share MSR #defines with the kernel.

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
This commit is contained in:
Len Brown 2012-10-31 01:29:52 -04:00
parent d91bb17c2a
commit 9c63a650bb
3 changed files with 22 additions and 19 deletions
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14
arch/x86/include/asm/msr-index.h
View File

@ -35,11 +35,14 @@
#define MSR_IA32_PERFCTR0 0x000000c1
#define MSR_IA32_PERFCTR1 0x000000c2
#define MSR_FSB_FREQ 0x000000cd
#define MSR_NHM_PLATFORM_INFO 0x000000ce
#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
#define NHM_C3_AUTO_DEMOTE (1UL << 25)
#define NHM_C1_AUTO_DEMOTE (1UL << 26)
#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
#define MSR_MTRRcap 0x000000fe
#define MSR_IA32_BBL_CR_CTL 0x00000119
@ -55,6 +58,8 @@
#define MSR_OFFCORE_RSP_0 0x000001a6
#define MSR_OFFCORE_RSP_1 0x000001a7
#define MSR_NHM_TURBO_RATIO_LIMIT 0x000001ad
#define MSR_IVT_TURBO_RATIO_LIMIT 0x000001ae
#define MSR_LBR_SELECT 0x000001c8
#define MSR_LBR_TOS 0x000001c9
@ -103,6 +108,15 @@
#define MSR_IA32_MC0_ADDR 0x00000402
#define MSR_IA32_MC0_MISC 0x00000403
/* C-state Residency Counters */
#define MSR_PKG_C3_RESIDENCY 0x000003f8
#define MSR_PKG_C6_RESIDENCY 0x000003f9
#define MSR_PKG_C7_RESIDENCY 0x000003fa
#define MSR_CORE_C3_RESIDENCY 0x000003fc
#define MSR_CORE_C6_RESIDENCY 0x000003fd
#define MSR_CORE_C7_RESIDENCY 0x000003fe
#define MSR_PKG_C2_RESIDENCY 0x0000060d
#define MSR_AMD64_MC0_MASK 0xc0010044
#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))

1
tools/power/x86/turbostat/Makefile
View File

@ -1,5 +1,6 @@
turbostat : turbostat.c
CFLAGS += -Wall
CFLAGS += -I../../../../arch/x86/include/
clean :
rm -f turbostat

26
tools/power/x86/turbostat/turbostat.c
View File

@ -20,6 +20,7 @@
*/
#define _GNU_SOURCE
#include <asm/msr.h>
#include <stdio.h>
#include <unistd.h>
#include <sys/types.h>
@ -35,19 +36,6 @@
#include <ctype.h>
#include <sched.h>
#define MSR_NEHALEM_PLATFORM_INFO 0xCE
#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1AD
#define MSR_IVT_TURBO_RATIO_LIMIT 0x1AE
#define MSR_APERF 0xE8
#define MSR_MPERF 0xE7
#define MSR_PKG_C2_RESIDENCY 0x60D /* SNB only */
#define MSR_PKG_C3_RESIDENCY 0x3F8
#define MSR_PKG_C6_RESIDENCY 0x3F9
#define MSR_PKG_C7_RESIDENCY 0x3FA /* SNB only */
#define MSR_CORE_C3_RESIDENCY 0x3FC
#define MSR_CORE_C6_RESIDENCY 0x3FD
#define MSR_CORE_C7_RESIDENCY 0x3FE /* SNB only */
char *proc_stat = "/proc/stat";
unsigned int interval_sec = 5; /* set with -i interval_sec */
unsigned int verbose; /* set with -v */
@ -674,9 +662,9 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
t->tsc = rdtsc(); /* we are running on local CPU of interest */
if (has_aperf) {
if (get_msr(cpu, MSR_APERF, &t->aperf))
if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
return -3;
if (get_msr(cpu, MSR_MPERF, &t->mperf))
if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
return -4;
}
@ -742,10 +730,10 @@ void print_verbose_header(void)
if (!do_nehalem_platform_info)
return;
get_msr(0, MSR_NEHALEM_PLATFORM_INFO, &msr);
get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
if (verbose > 1)
fprintf(stderr, "MSR_NEHALEM_PLATFORM_INFO: 0x%llx\n", msr);
fprintf(stderr, "MSR_NHM_PLATFORM_INFO: 0x%llx\n", msr);
ratio = (msr >> 40) & 0xFF;
fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
@ -808,10 +796,10 @@ print_nhm_turbo_ratio_limits:
if (!do_nehalem_turbo_ratio_limit)
return;
get_msr(0, MSR_NEHALEM_TURBO_RATIO_LIMIT, &msr);
get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
if (verbose > 1)
fprintf(stderr, "MSR_NEHALEM_TURBO_RATIO_LIMIT: 0x%llx\n", msr);
fprintf(stderr, "MSR_NHM_TURBO_RATIO_LIMIT: 0x%llx\n", msr);
ratio = (msr >> 56) & 0xFF;
if (ratio)