ARM: 5973/1: ux500: add gpio support
Add support for the GPIOs on the U8500, using the plat-nomadik GPIO driver. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Rabin Vincent
Russell King
parent
1df20afce5
commit
94bdc0e2d7
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@ -756,6 +756,7 @@ config ARCH_U8500
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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select COMMON_CLKDEV
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select ARCH_REQUIRE_GPIOLIB
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help
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Support for ST-Ericsson's Ux500 architecture
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@ -8,6 +8,7 @@ config MACH_U8500_MOP
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default y
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select ARM_GIC
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select HAS_MTU
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select NOMADIK_GPIO
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help
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Include support for mop500 development platform
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based on U8500 architecture. The platform is based
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@ -13,6 +13,7 @@
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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@ -23,9 +24,82 @@
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#include <mach/hardware.h>
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#include <mach/setup.h>
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/* add any platform devices here - TODO */
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#define GPIO_RESOURCE(block) \
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{ \
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.start = U8500_GPIOBANK##block##_BASE, \
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.end = U8500_GPIOBANK##block##_BASE + 127, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = IRQ_GPIO##block, \
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.end = IRQ_GPIO##block, \
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.flags = IORESOURCE_IRQ, \
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}
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#define GPIO_DEVICE(block) \
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{ \
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.name = "gpio", \
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.id = block, \
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.num_resources = 2, \
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.resource = &u8500_gpio_resources[block * 2], \
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.dev = { \
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.platform_data = &u8500_gpio_data[block], \
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}, \
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}
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#define GPIO_DATA(_name, first) \
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{ \
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.name = _name, \
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.first_gpio = first, \
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.first_irq = NOMADIK_GPIO_TO_IRQ(first), \
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}
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static struct nmk_gpio_platform_data u8500_gpio_data[] = {
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GPIO_DATA("GPIO-0-31", 0),
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GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
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GPIO_DATA("GPIO-64-95", 64),
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GPIO_DATA("GPIO-96-127", 96), /* 97..127 not routed to pin */
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GPIO_DATA("GPIO-128-159", 128),
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GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
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GPIO_DATA("GPIO-192-223", 192),
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GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
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GPIO_DATA("GPIO-256-288", 256), /* 258..288 not routed to pin */
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};
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static struct resource u8500_gpio_resources[] = {
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GPIO_RESOURCE(0),
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GPIO_RESOURCE(1),
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GPIO_RESOURCE(2),
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GPIO_RESOURCE(3),
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GPIO_RESOURCE(4),
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GPIO_RESOURCE(5),
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GPIO_RESOURCE(6),
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GPIO_RESOURCE(7),
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GPIO_RESOURCE(8),
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};
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static struct platform_device u8500_gpio_devs[] = {
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GPIO_DEVICE(0),
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GPIO_DEVICE(1),
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GPIO_DEVICE(2),
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GPIO_DEVICE(3),
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GPIO_DEVICE(4),
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GPIO_DEVICE(5),
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GPIO_DEVICE(6),
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GPIO_DEVICE(7),
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GPIO_DEVICE(8),
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};
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static struct platform_device *platform_devs[] __initdata = {
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/* yet to be added, add i2c0, gpio.. */
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&u8500_gpio_devs[0],
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&u8500_gpio_devs[1],
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&u8500_gpio_devs[2],
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&u8500_gpio_devs[3],
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&u8500_gpio_devs[4],
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&u8500_gpio_devs[5],
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&u8500_gpio_devs[6],
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&u8500_gpio_devs[7],
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&u8500_gpio_devs[8],
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};
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#define __IO_DEV_DESC(x, sz) { \
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@ -49,6 +123,10 @@ static struct map_desc u8500_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO5_BASE, SZ_4K),
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};
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static struct map_desc u8500ed_io_desc[] __initdata = {
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@ -0,0 +1,12 @@
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#ifndef __ASM_ARCH_GPIO_H
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#define __ASM_ARCH_GPIO_H
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/*
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* 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
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* room for a couple of GPIO expanders.
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*/
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#define ARCH_NR_GPIOS 350
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#include <plat/gpio.h>
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#endif /* __ASM_ARCH_GPIO_H */
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@ -23,6 +23,8 @@
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/* typesafe io address */
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#define __io_address(n) __io(IO_ADDRESS(n))
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/* used by some plat-nomadik code */
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#define io_p2v(n) __io_address(n)
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/*
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* Base address definitions for U8500 Onchip IPs. All the
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@ -128,6 +130,16 @@
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#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000)
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#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
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#define U8500_GPIOBANK0_BASE U8500_GPIO1_BASE
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#define U8500_GPIOBANK1_BASE (U8500_GPIO1_BASE + 0x80)
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#define U8500_GPIOBANK2_BASE U8500_GPIO3_BASE
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#define U8500_GPIOBANK3_BASE (U8500_GPIO3_BASE + 0x80)
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#define U8500_GPIOBANK4_BASE (U8500_GPIO3_BASE + 0x100)
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#define U8500_GPIOBANK5_BASE (U8500_GPIO3_BASE + 0x180)
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#define U8500_GPIOBANK6_BASE U8500_GPIO2_BASE
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#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80)
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#define U8500_GPIOBANK8_BASE U8500_GPIO5_BASE
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/* ST-Ericsson modified pl022 id */
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#define SSP_PER_ID 0x01080022
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@ -66,6 +66,12 @@
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/* There are 128 shared peripheral interrupts assigned to
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* INTID[160:32]. The first 32 interrupts are reserved.
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*/
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#define NR_IRQS 161
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#define U8500_SOC_NR_IRQS 161
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/* After chip-specific IRQ numbers we have the GPIO ones */
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#define NOMADIK_NR_GPIO 288
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#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + U8500_SOC_NR_IRQS)
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#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - U8500_SOC_NR_IRQS)
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#define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
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#endif /*ASM_ARCH_IRQS_H*/
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