Merge branch 'master' [vanilla Linus master] into libata-dev.git/upstream
Two bits were appended to the end of the bitfield list in struct scsi_device. Resolve that conflict by including both bits. Conflicts: include/scsi/scsi_device.h
This commit is contained in:
Jeff Garzik
Jeff Garzik
commit
8407884dd9
|
|
@ -24,4 +24,4 @@ though.
|
|||
|
||||
(As of this writing, this ABI documentation as been confirmed for x86_64.
|
||||
The maintainers of the other vDSO-using architectures should confirm
|
||||
that it is correct for their architecture.)
|
||||
that it is correct for their architecture.)
|
||||
|
|
|
|||
|
|
@ -1,26 +1,5 @@
|
|||
What: /sys/block/rssd*/registers
|
||||
Date: March 2012
|
||||
KernelVersion: 3.3
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Dumps below driver information and
|
||||
hardware registers.
|
||||
- S ACTive
|
||||
- Command Issue
|
||||
- Completed
|
||||
- PORT IRQ STAT
|
||||
- HOST IRQ STAT
|
||||
- Allocated
|
||||
- Commands in Q
|
||||
|
||||
What: /sys/block/rssd*/status
|
||||
Date: April 2012
|
||||
KernelVersion: 3.4
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Indicates the status of the device.
|
||||
|
||||
What: /sys/block/rssd*/flags
|
||||
Date: May 2012
|
||||
KernelVersion: 3.5
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Dumps the flags in port and driver
|
||||
data structure
|
||||
|
|
|
|||
|
|
@ -96,4 +96,4 @@ Description:
|
|||
overhead, allocated for this disk. So, allocator space
|
||||
efficiency can be calculated using compr_data_size and this
|
||||
statistic.
|
||||
Unit: bytes
|
||||
Unit: bytes
|
||||
|
|
|
|||
|
|
@ -40,4 +40,4 @@ Description: Controls the decimal places on the device.
|
|||
the value of 10 ** n. Assume this field has
|
||||
the value k and has 1 or more decimal places set,
|
||||
to set the mth place (where m is not already set),
|
||||
change this fields value to k + 10 ** m.
|
||||
change this fields value to k + 10 ** m.
|
||||
|
|
|
|||
|
|
@ -53,4 +53,4 @@ Description:
|
|||
Documentation/ABI/stable/sysfs-class-backlight.
|
||||
It can be enabled by writing the value stored in
|
||||
/sys/class/backlight/<backlight>/max_brightness to
|
||||
/sys/class/backlight/<backlight>/brightness.
|
||||
/sys/class/backlight/<backlight>/brightness.
|
||||
|
|
|
|||
|
|
@ -142,13 +142,14 @@ KernelVersion: 3.4
|
|||
Contact: linux-mtd@lists.infradead.org
|
||||
Description:
|
||||
This allows the user to examine and adjust the criteria by which
|
||||
mtd returns -EUCLEAN from mtd_read(). If the maximum number of
|
||||
bit errors that were corrected on any single region comprising
|
||||
an ecc step (as reported by the driver) equals or exceeds this
|
||||
value, -EUCLEAN is returned. Otherwise, absent an error, 0 is
|
||||
returned. Higher layers (e.g., UBI) use this return code as an
|
||||
indication that an erase block may be degrading and should be
|
||||
scrutinized as a candidate for being marked as bad.
|
||||
mtd returns -EUCLEAN from mtd_read() and mtd_read_oob(). If the
|
||||
maximum number of bit errors that were corrected on any single
|
||||
region comprising an ecc step (as reported by the driver) equals
|
||||
or exceeds this value, -EUCLEAN is returned. Otherwise, absent
|
||||
an error, 0 is returned. Higher layers (e.g., UBI) use this
|
||||
return code as an indication that an erase block may be
|
||||
degrading and should be scrutinized as a candidate for being
|
||||
marked as bad.
|
||||
|
||||
The initial value may be specified by the flash device driver.
|
||||
If not, then the default value is ecc_strength.
|
||||
|
|
@ -167,7 +168,7 @@ Description:
|
|||
block degradation, but high enough to avoid the consequences of
|
||||
a persistent return value of -EUCLEAN on devices where sticky
|
||||
bitflips occur. Note that if bitflip_threshold exceeds
|
||||
ecc_strength, -EUCLEAN is never returned by mtd_read().
|
||||
ecc_strength, -EUCLEAN is never returned by the read operations.
|
||||
Conversely, if bitflip_threshold is zero, -EUCLEAN is always
|
||||
returned, absent a hard error.
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,20 @@
|
|||
What: /sys/devices/system/xen_cpu/
|
||||
Date: May 2012
|
||||
Contact: Liu, Jinsong <jinsong.liu@intel.com>
|
||||
Description:
|
||||
A collection of global/individual Xen physical cpu attributes
|
||||
|
||||
Individual physical cpu attributes are contained in
|
||||
subdirectories named by the Xen's logical cpu number, e.g.:
|
||||
/sys/devices/system/xen_cpu/xen_cpu#/
|
||||
|
||||
|
||||
What: /sys/devices/system/xen_cpu/xen_cpu#/online
|
||||
Date: May 2012
|
||||
Contact: Liu, Jinsong <jinsong.liu@intel.com>
|
||||
Description:
|
||||
Interface to online/offline Xen physical cpus
|
||||
|
||||
When running under Xen platform, it provide user interface
|
||||
to online/offline physical cpus, except cpu0 due to several
|
||||
logic restrictions and assumptions.
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/press_to_select
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: This controls if mouse clicks should be generated if the trackpoint is quickly pressed. How fast this press has to be
|
||||
is being controlled by press_speed.
|
||||
Values are 0 or 1.
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/dragging
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: If this setting is enabled, it is possible to do dragging by pressing the trackpoint. This requires press_to_select to be enabled.
|
||||
Values are 0 or 1.
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/release_to_select
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: For details regarding this setting please refer to http://www.pc.ibm.com/ww/healthycomputing/trkpntb.html
|
||||
Values are 0 or 1.
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/select_right
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: This setting controls if the mouse click events generated by pressing the trackpoint (if press_to_select is enabled) generate
|
||||
a left or right mouse button click.
|
||||
Values are 0 or 1.
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/sensitivity
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: This file contains the trackpoint sensitivity.
|
||||
Values are decimal integers from 1 (lowest sensitivity) to 255 (highest sensitivity).
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/press_speed
|
||||
Date: July 2011
|
||||
Contact: linux-input@vger.kernel.org
|
||||
Description: This setting controls how fast the trackpoint needs to be pressed to generate a mouse click if press_to_select is enabled.
|
||||
Values are decimal integers from 1 (slowest) to 255 (fastest).
|
||||
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/buttons
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: The mouse can store 5 profiles which can be switched by the
|
||||
press of a button. A profile is split into general settings and
|
||||
button settings. buttons holds informations about button layout.
|
||||
When written, this file lets one write the respective profile
|
||||
buttons to the mouse. The data has to be 47 bytes long.
|
||||
The mouse will reject invalid data.
|
||||
Which profile to write is determined by the profile number
|
||||
contained in the data.
|
||||
Before reading this file, control has to be written to select
|
||||
which profile to read.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/control
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: When written, this file lets one select which data from which
|
||||
profile will be read next. The data has to be 3 bytes long.
|
||||
This file is writeonly.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/general
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: The mouse can store 5 profiles which can be switched by the
|
||||
press of a button. A profile is split into general settings and
|
||||
button settings. profile holds informations like resolution, sensitivity
|
||||
and light effects.
|
||||
When written, this file lets one write the respective profile
|
||||
settings back to the mouse. The data has to be 43 bytes long.
|
||||
The mouse will reject invalid data.
|
||||
Which profile to write is determined by the profile number
|
||||
contained in the data.
|
||||
This file is writeonly.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/info
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: When read, this file returns general data like firmware version.
|
||||
The data is 8 bytes long.
|
||||
This file is readonly.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/macro
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: When written, this file lets one store macros with max 500
|
||||
keystrokes for a specific button for a specific profile.
|
||||
Button and profile numbers are included in written data.
|
||||
The data has to be 2083 bytes long.
|
||||
Before reading this file, control has to be written to select
|
||||
which profile and key to read.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/profile
|
||||
Date: Mai 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: The mouse can store 5 profiles which can be switched by the
|
||||
press of a button. profile holds number of actual profile.
|
||||
This value is persistent, so its value determines the profile
|
||||
that's active when the mouse is powered on next time.
|
||||
When written, the mouse activates the set profile immediately.
|
||||
The data has to be 3 bytes long.
|
||||
The mouse will reject invalid data.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/savu/roccatsavu<minor>/sensor
|
||||
Date: July 2012
|
||||
Contact: Stefan Achatz <erazor_de@users.sourceforge.net>
|
||||
Description: The mouse has a Avago ADNS-3090 sensor.
|
||||
This file allows reading and writing of the mouse sensors registers.
|
||||
The data has to be 4 bytes long.
|
||||
Users: http://roccat.sourceforge.net
|
||||
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
What: /sys/kernel/iommu_groups/
|
||||
Date: May 2012
|
||||
KernelVersion: v3.5
|
||||
Contact: Alex Williamson <alex.williamson@redhat.com>
|
||||
Description: /sys/kernel/iommu_groups/ contains a number of sub-
|
||||
directories, each representing an IOMMU group. The
|
||||
name of the sub-directory matches the iommu_group_id()
|
||||
for the group, which is an integer value. Within each
|
||||
subdirectory is another directory named "devices" with
|
||||
links to the sysfs devices contained in this group.
|
||||
The group directory also optionally contains a "name"
|
||||
file if the IOMMU driver has chosen to register a more
|
||||
common name for the group.
|
||||
Users:
|
||||
|
|
@ -231,3 +231,16 @@ Description:
|
|||
Reads from this file return a string consisting of the names of
|
||||
wakeup sources created with the help of /sys/power/wake_lock
|
||||
that are inactive at the moment, separated with spaces.
|
||||
|
||||
What: /sys/power/pm_print_times
|
||||
Date: May 2012
|
||||
Contact: Sameer Nanda <snanda@chromium.org>
|
||||
Description:
|
||||
The /sys/power/pm_print_times file allows user space to
|
||||
control whether the time taken by devices to suspend and
|
||||
resume is printed. These prints are useful for hunting down
|
||||
devices that take too long to suspend or resume.
|
||||
|
||||
Writing a "1" enables this printing while writing a "0"
|
||||
disables it. The default value is "0". Reading from this file
|
||||
will display the current value.
|
||||
|
|
|
|||
|
|
@ -404,7 +404,6 @@
|
|||
!Finclude/net/mac80211.h ieee80211_get_tkip_p1k
|
||||
!Finclude/net/mac80211.h ieee80211_get_tkip_p1k_iv
|
||||
!Finclude/net/mac80211.h ieee80211_get_tkip_p2k
|
||||
!Finclude/net/mac80211.h ieee80211_key_removed
|
||||
</chapter>
|
||||
|
||||
<chapter id="powersave">
|
||||
|
|
|
|||
|
|
@ -3988,7 +3988,7 @@ interface and may change in the future.</para>
|
|||
from RGB to Y'CbCr color space.
|
||||
</entry>
|
||||
</row>
|
||||
<row id = "v4l2-jpeg-chroma-subsampling">
|
||||
<row>
|
||||
<entrytbl spanname="descr" cols="2">
|
||||
<tbody valign="top">
|
||||
<row>
|
||||
|
|
|
|||
|
|
@ -284,13 +284,6 @@ These controls are described in <xref
|
|||
processing controls. These controls are described in <xref
|
||||
linkend="image-process-controls" />.</entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry><constant>V4L2_CTRL_CLASS_JPEG</constant></entry>
|
||||
<entry>0x9d0000</entry>
|
||||
<entry>The class containing JPEG compression controls.
|
||||
These controls are described in <xref
|
||||
linkend="jpeg-controls" />.</entry>
|
||||
</row>
|
||||
</tbody>
|
||||
</tgroup>
|
||||
</table>
|
||||
|
|
|
|||
|
|
@ -178,7 +178,7 @@ sadly that you are one too, and that while we can all bask in the secure
|
|||
knowledge that we're better than the average person (let's face it,
|
||||
nobody ever believes that they're average or below-average), we should
|
||||
also admit that we're not the sharpest knife around, and there will be
|
||||
other people that are less of an idiot that you are.
|
||||
other people that are less of an idiot than you are.
|
||||
|
||||
Some people react badly to smart people. Others take advantage of them.
|
||||
|
||||
|
|
|
|||
|
|
@ -162,9 +162,9 @@ over a rather long period of time, but improvements are always welcome!
|
|||
when publicizing a pointer to a structure that can
|
||||
be traversed by an RCU read-side critical section.
|
||||
|
||||
5. If call_rcu(), or a related primitive such as call_rcu_bh() or
|
||||
call_rcu_sched(), is used, the callback function must be
|
||||
written to be called from softirq context. In particular,
|
||||
5. If call_rcu(), or a related primitive such as call_rcu_bh(),
|
||||
call_rcu_sched(), or call_srcu() is used, the callback function
|
||||
must be written to be called from softirq context. In particular,
|
||||
it cannot block.
|
||||
|
||||
6. Since synchronize_rcu() can block, it cannot be called from
|
||||
|
|
@ -202,11 +202,12 @@ over a rather long period of time, but improvements are always welcome!
|
|||
updater uses call_rcu_sched() or synchronize_sched(), then
|
||||
the corresponding readers must disable preemption, possibly
|
||||
by calling rcu_read_lock_sched() and rcu_read_unlock_sched().
|
||||
If the updater uses synchronize_srcu(), the the corresponding
|
||||
readers must use srcu_read_lock() and srcu_read_unlock(),
|
||||
and with the same srcu_struct. The rules for the expedited
|
||||
primitives are the same as for their non-expedited counterparts.
|
||||
Mixing things up will result in confusion and broken kernels.
|
||||
If the updater uses synchronize_srcu() or call_srcu(),
|
||||
the the corresponding readers must use srcu_read_lock() and
|
||||
srcu_read_unlock(), and with the same srcu_struct. The rules for
|
||||
the expedited primitives are the same as for their non-expedited
|
||||
counterparts. Mixing things up will result in confusion and
|
||||
broken kernels.
|
||||
|
||||
One exception to this rule: rcu_read_lock() and rcu_read_unlock()
|
||||
may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh()
|
||||
|
|
@ -333,14 +334,14 @@ over a rather long period of time, but improvements are always welcome!
|
|||
victim CPU from ever going offline.)
|
||||
|
||||
14. SRCU (srcu_read_lock(), srcu_read_unlock(), srcu_dereference(),
|
||||
synchronize_srcu(), and synchronize_srcu_expedited()) may only
|
||||
be invoked from process context. Unlike other forms of RCU, it
|
||||
-is- permissible to block in an SRCU read-side critical section
|
||||
(demarked by srcu_read_lock() and srcu_read_unlock()), hence the
|
||||
"SRCU": "sleepable RCU". Please note that if you don't need
|
||||
to sleep in read-side critical sections, you should be using
|
||||
RCU rather than SRCU, because RCU is almost always faster and
|
||||
easier to use than is SRCU.
|
||||
synchronize_srcu(), synchronize_srcu_expedited(), and call_srcu())
|
||||
may only be invoked from process context. Unlike other forms of
|
||||
RCU, it -is- permissible to block in an SRCU read-side critical
|
||||
section (demarked by srcu_read_lock() and srcu_read_unlock()),
|
||||
hence the "SRCU": "sleepable RCU". Please note that if you
|
||||
don't need to sleep in read-side critical sections, you should be
|
||||
using RCU rather than SRCU, because RCU is almost always faster
|
||||
and easier to use than is SRCU.
|
||||
|
||||
If you need to enter your read-side critical section in a
|
||||
hardirq or exception handler, and then exit that same read-side
|
||||
|
|
@ -353,8 +354,8 @@ over a rather long period of time, but improvements are always welcome!
|
|||
cleanup_srcu_struct(). These are passed a "struct srcu_struct"
|
||||
that defines the scope of a given SRCU domain. Once initialized,
|
||||
the srcu_struct is passed to srcu_read_lock(), srcu_read_unlock()
|
||||
synchronize_srcu(), and synchronize_srcu_expedited(). A given
|
||||
synchronize_srcu() waits only for SRCU read-side critical
|
||||
synchronize_srcu(), synchronize_srcu_expedited(), and call_srcu().
|
||||
A given synchronize_srcu() waits only for SRCU read-side critical
|
||||
sections governed by srcu_read_lock() and srcu_read_unlock()
|
||||
calls that have been passed the same srcu_struct. This property
|
||||
is what makes sleeping read-side critical sections tolerable --
|
||||
|
|
@ -374,7 +375,7 @@ over a rather long period of time, but improvements are always welcome!
|
|||
requiring SRCU's read-side deadlock immunity or low read-side
|
||||
realtime latency.
|
||||
|
||||
Note that, rcu_assign_pointer() relates to SRCU just as they do
|
||||
Note that, rcu_assign_pointer() relates to SRCU just as it does
|
||||
to other forms of RCU.
|
||||
|
||||
15. The whole point of call_rcu(), synchronize_rcu(), and friends
|
||||
|
|
|
|||
|
|
@ -79,8 +79,6 @@ complete. Pseudo-code using rcu_barrier() is as follows:
|
|||
2. Execute rcu_barrier().
|
||||
3. Allow the module to be unloaded.
|
||||
|
||||
Quick Quiz #1: Why is there no srcu_barrier()?
|
||||
|
||||
The rcutorture module makes use of rcu_barrier in its exit function
|
||||
as follows:
|
||||
|
||||
|
|
@ -162,7 +160,7 @@ for any pre-existing callbacks to complete.
|
|||
Then lines 55-62 print status and do operation-specific cleanup, and
|
||||
then return, permitting the module-unload operation to be completed.
|
||||
|
||||
Quick Quiz #2: Is there any other situation where rcu_barrier() might
|
||||
Quick Quiz #1: Is there any other situation where rcu_barrier() might
|
||||
be required?
|
||||
|
||||
Your module might have additional complications. For example, if your
|
||||
|
|
@ -242,7 +240,7 @@ reaches zero, as follows:
|
|||
4 complete(&rcu_barrier_completion);
|
||||
5 }
|
||||
|
||||
Quick Quiz #3: What happens if CPU 0's rcu_barrier_func() executes
|
||||
Quick Quiz #2: What happens if CPU 0's rcu_barrier_func() executes
|
||||
immediately (thus incrementing rcu_barrier_cpu_count to the
|
||||
value one), but the other CPU's rcu_barrier_func() invocations
|
||||
are delayed for a full grace period? Couldn't this result in
|
||||
|
|
@ -259,12 +257,7 @@ so that your module may be safely unloaded.
|
|||
|
||||
Answers to Quick Quizzes
|
||||
|
||||
Quick Quiz #1: Why is there no srcu_barrier()?
|
||||
|
||||
Answer: Since there is no call_srcu(), there can be no outstanding SRCU
|
||||
callbacks. Therefore, there is no need to wait for them.
|
||||
|
||||
Quick Quiz #2: Is there any other situation where rcu_barrier() might
|
||||
Quick Quiz #1: Is there any other situation where rcu_barrier() might
|
||||
be required?
|
||||
|
||||
Answer: Interestingly enough, rcu_barrier() was not originally
|
||||
|
|
@ -278,7 +271,7 @@ Answer: Interestingly enough, rcu_barrier() was not originally
|
|||
implementing rcutorture, and found that rcu_barrier() solves
|
||||
this problem as well.
|
||||
|
||||
Quick Quiz #3: What happens if CPU 0's rcu_barrier_func() executes
|
||||
Quick Quiz #2: What happens if CPU 0's rcu_barrier_func() executes
|
||||
immediately (thus incrementing rcu_barrier_cpu_count to the
|
||||
value one), but the other CPU's rcu_barrier_func() invocations
|
||||
are delayed for a full grace period? Couldn't this result in
|
||||
|
|
|
|||
|
|
@ -174,11 +174,20 @@ torture_type The type of RCU to test, with string values as follows:
|
|||
and synchronize_rcu_bh_expedited().
|
||||
|
||||
"srcu": srcu_read_lock(), srcu_read_unlock() and
|
||||
call_srcu().
|
||||
|
||||
"srcu_sync": srcu_read_lock(), srcu_read_unlock() and
|
||||
synchronize_srcu().
|
||||
|
||||
"srcu_expedited": srcu_read_lock(), srcu_read_unlock() and
|
||||
synchronize_srcu_expedited().
|
||||
|
||||
"srcu_raw": srcu_read_lock_raw(), srcu_read_unlock_raw(),
|
||||
and call_srcu().
|
||||
|
||||
"srcu_raw_sync": srcu_read_lock_raw(), srcu_read_unlock_raw(),
|
||||
and synchronize_srcu().
|
||||
|
||||
"sched": preempt_disable(), preempt_enable(), and
|
||||
call_rcu_sched().
|
||||
|
||||
|
|
|
|||
|
|
@ -833,9 +833,9 @@ sched: Critical sections Grace period Barrier
|
|||
|
||||
SRCU: Critical sections Grace period Barrier
|
||||
|
||||
srcu_read_lock synchronize_srcu N/A
|
||||
srcu_read_unlock synchronize_srcu_expedited
|
||||
srcu_read_lock_raw
|
||||
srcu_read_lock synchronize_srcu srcu_barrier
|
||||
srcu_read_unlock call_srcu
|
||||
srcu_read_lock_raw synchronize_srcu_expedited
|
||||
srcu_read_unlock_raw
|
||||
srcu_dereference
|
||||
|
||||
|
|
|
|||
|
|
@ -37,4 +37,4 @@ Maintainers
|
|||
Thanks to the many others who have also provided support.
|
||||
|
||||
|
||||
(c) 2005 Ben Dooks
|
||||
(c) 2005 Ben Dooks
|
||||
|
|
|
|||
|
|
@ -53,4 +53,4 @@ Maintainers
|
|||
and to Simtec Electronics for allowing me time to work on this.
|
||||
|
||||
|
||||
(c) 2004 Ben Dooks
|
||||
(c) 2004 Ben Dooks
|
||||
|
|
|
|||
|
|
@ -370,15 +370,12 @@ To mount a cgroup hierarchy with just the cpuset and memory
|
|||
subsystems, type:
|
||||
# mount -t cgroup -o cpuset,memory hier1 /sys/fs/cgroup/rg1
|
||||
|
||||
To change the set of subsystems bound to a mounted hierarchy, just
|
||||
remount with different options:
|
||||
# mount -o remount,cpuset,blkio hier1 /sys/fs/cgroup/rg1
|
||||
|
||||
Now memory is removed from the hierarchy and blkio is added.
|
||||
|
||||
Note this will add blkio to the hierarchy but won't remove memory or
|
||||
cpuset, because the new options are appended to the old ones:
|
||||
# mount -o remount,blkio /sys/fs/cgroup/rg1
|
||||
While remounting cgroups is currently supported, it is not recommend
|
||||
to use it. Remounting allows changing bound subsystems and
|
||||
release_agent. Rebinding is hardly useful as it only works when the
|
||||
hierarchy is empty and release_agent itself should be replaced with
|
||||
conventional fsnotify. The support for remounting will be removed in
|
||||
the future.
|
||||
|
||||
To Specify a hierarchy's release_agent:
|
||||
# mount -t cgroup -o cpuset,release_agent="/sbin/cpuset_release_agent" \
|
||||
|
|
@ -637,16 +634,6 @@ void exit(struct task_struct *task)
|
|||
|
||||
Called during task exit.
|
||||
|
||||
int populate(struct cgroup *cgrp)
|
||||
(cgroup_mutex held by caller)
|
||||
|
||||
Called after creation of a cgroup to allow a subsystem to populate
|
||||
the cgroup directory with file entries. The subsystem should make
|
||||
calls to cgroup_add_file() with objects of type cftype (see
|
||||
include/linux/cgroup.h for details). Note that although this
|
||||
method can return an error code, the error code is currently not
|
||||
always handled well.
|
||||
|
||||
void post_clone(struct cgroup *cgrp)
|
||||
(cgroup_mutex held by caller)
|
||||
|
||||
|
|
@ -656,7 +643,7 @@ example in cpusets, no task may attach before 'cpus' and 'mems' are set
|
|||
up.
|
||||
|
||||
void bind(struct cgroup *root)
|
||||
(cgroup_mutex and ss->hierarchy_mutex held by caller)
|
||||
(cgroup_mutex held by caller)
|
||||
|
||||
Called when a cgroup subsystem is rebound to a different hierarchy
|
||||
and root cgroup. Currently this will only involve movement between
|
||||
|
|
|
|||
|
|
@ -69,9 +69,13 @@ static int cn_test_want_notify(void)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
nlh = NLMSG_PUT(skb, 0, 0x123, NLMSG_DONE, size - sizeof(*nlh));
|
||||
nlh = nlmsg_put(skb, 0, 0x123, NLMSG_DONE, size - sizeof(*nlh), 0);
|
||||
if (!nlh) {
|
||||
kfree_skb(skb);
|
||||
return -EMSGSIZE;
|
||||
}
|
||||
|
||||
msg = (struct cn_msg *)NLMSG_DATA(nlh);
|
||||
msg = nlmsg_data(nlh);
|
||||
|
||||
memset(msg, 0, size0);
|
||||
|
||||
|
|
@ -117,11 +121,6 @@ static int cn_test_want_notify(void)
|
|||
pr_info("request was sent: group=0x%x\n", ctl->group);
|
||||
|
||||
return 0;
|
||||
|
||||
nlmsg_failure:
|
||||
pr_err("failed to send %u.%u\n", msg->seq, msg->ack);
|
||||
kfree_skb(skb);
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -7,39 +7,39 @@ This target is read-only.
|
|||
|
||||
Construction Parameters
|
||||
=======================
|
||||
<version> <dev> <hash_dev> <hash_start>
|
||||
<version> <dev> <hash_dev>
|
||||
<data_block_size> <hash_block_size>
|
||||
<num_data_blocks> <hash_start_block>
|
||||
<algorithm> <digest> <salt>
|
||||
|
||||
<version>
|
||||
This is the version number of the on-disk format.
|
||||
This is the type of the on-disk hash format.
|
||||
|
||||
0 is the original format used in the Chromium OS.
|
||||
The salt is appended when hashing, digests are stored continuously and
|
||||
the rest of the block is padded with zeros.
|
||||
The salt is appended when hashing, digests are stored continuously and
|
||||
the rest of the block is padded with zeros.
|
||||
|
||||
1 is the current format that should be used for new devices.
|
||||
The salt is prepended when hashing and each digest is
|
||||
padded with zeros to the power of two.
|
||||
The salt is prepended when hashing and each digest is
|
||||
padded with zeros to the power of two.
|
||||
|
||||
<dev>
|
||||
This is the device containing the data the integrity of which needs to be
|
||||
This is the device containing data, the integrity of which needs to be
|
||||
checked. It may be specified as a path, like /dev/sdaX, or a device number,
|
||||
<major>:<minor>.
|
||||
|
||||
<hash_dev>
|
||||
This is the device that that supplies the hash tree data. It may be
|
||||
This is the device that supplies the hash tree data. It may be
|
||||
specified similarly to the device path and may be the same device. If the
|
||||
same device is used, the hash_start should be outside of the dm-verity
|
||||
configured device size.
|
||||
same device is used, the hash_start should be outside the configured
|
||||
dm-verity device.
|
||||
|
||||
<data_block_size>
|
||||
The block size on a data device. Each block corresponds to one digest on
|
||||
the hash device.
|
||||
The block size on a data device in bytes.
|
||||
Each block corresponds to one digest on the hash device.
|
||||
|
||||
<hash_block_size>
|
||||
The size of a hash block.
|
||||
The size of a hash block in bytes.
|
||||
|
||||
<num_data_blocks>
|
||||
The number of data blocks on the data device. Additional blocks are
|
||||
|
|
@ -65,7 +65,7 @@ Construction Parameters
|
|||
Theory of operation
|
||||
===================
|
||||
|
||||
dm-verity is meant to be setup as part of a verified boot path. This
|
||||
dm-verity is meant to be set up as part of a verified boot path. This
|
||||
may be anything ranging from a boot using tboot or trustedgrub to just
|
||||
booting from a known-good device (like a USB drive or CD).
|
||||
|
||||
|
|
@ -73,20 +73,20 @@ When a dm-verity device is configured, it is expected that the caller
|
|||
has been authenticated in some way (cryptographic signatures, etc).
|
||||
After instantiation, all hashes will be verified on-demand during
|
||||
disk access. If they cannot be verified up to the root node of the
|
||||
tree, the root hash, then the I/O will fail. This should identify
|
||||
tree, the root hash, then the I/O will fail. This should detect
|
||||
tampering with any data on the device and the hash data.
|
||||
|
||||
Cryptographic hashes are used to assert the integrity of the device on a
|
||||
per-block basis. This allows for a lightweight hash computation on first read
|
||||
into the page cache. Block hashes are stored linearly-aligned to the nearest
|
||||
block the size of a page.
|
||||
per-block basis. This allows for a lightweight hash computation on first read
|
||||
into the page cache. Block hashes are stored linearly, aligned to the nearest
|
||||
block size.
|
||||
|
||||
Hash Tree
|
||||
---------
|
||||
|
||||
Each node in the tree is a cryptographic hash. If it is a leaf node, the hash
|
||||
is of some block data on disk. If it is an intermediary node, then the hash is
|
||||
of a number of child nodes.
|
||||
of some data block on disk is calculated. If it is an intermediary node,
|
||||
the hash of a number of child nodes is calculated.
|
||||
|
||||
Each entry in the tree is a collection of neighboring nodes that fit in one
|
||||
block. The number is determined based on block_size and the size of the
|
||||
|
|
@ -110,63 +110,23 @@ alg = sha256, num_blocks = 32768, block_size = 4096
|
|||
On-disk format
|
||||
==============
|
||||
|
||||
Below is the recommended on-disk format. The verity kernel code does not
|
||||
read the on-disk header. It only reads the hash blocks which directly
|
||||
follow the header. It is expected that a user-space tool will verify the
|
||||
integrity of the verity_header and then call dmsetup with the correct
|
||||
parameters. Alternatively, the header can be omitted and the dmsetup
|
||||
parameters can be passed via the kernel command-line in a rooted chain
|
||||
of trust where the command-line is verified.
|
||||
The verity kernel code does not read the verity metadata on-disk header.
|
||||
It only reads the hash blocks which directly follow the header.
|
||||
It is expected that a user-space tool will verify the integrity of the
|
||||
verity header.
|
||||
|
||||
The on-disk format is especially useful in cases where the hash blocks
|
||||
are on a separate partition. The magic number allows easy identification
|
||||
of the partition contents. Alternatively, the hash blocks can be stored
|
||||
in the same partition as the data to be verified. In such a configuration
|
||||
the filesystem on the partition would be sized a little smaller than
|
||||
the full-partition, leaving room for the hash blocks.
|
||||
|
||||
struct superblock {
|
||||
uint8_t signature[8]
|
||||
"verity\0\0";
|
||||
|
||||
uint8_t version;
|
||||
1 - current format
|
||||
|
||||
uint8_t data_block_bits;
|
||||
log2(data block size)
|
||||
|
||||
uint8_t hash_block_bits;
|
||||
log2(hash block size)
|
||||
|
||||
uint8_t pad1[1];
|
||||
zero padding
|
||||
|
||||
uint16_t salt_size;
|
||||
big-endian salt size
|
||||
|
||||
uint8_t pad2[2];
|
||||
zero padding
|
||||
|
||||
uint32_t data_blocks_hi;
|
||||
big-endian high 32 bits of the 64-bit number of data blocks
|
||||
|
||||
uint32_t data_blocks_lo;
|
||||
big-endian low 32 bits of the 64-bit number of data blocks
|
||||
|
||||
uint8_t algorithm[16];
|
||||
cryptographic algorithm
|
||||
|
||||
uint8_t salt[384];
|
||||
salt (the salt size is specified above)
|
||||
|
||||
uint8_t pad3[88];
|
||||
zero padding to 512-byte boundary
|
||||
}
|
||||
Alternatively, the header can be omitted and the dmsetup parameters can
|
||||
be passed via the kernel command-line in a rooted chain of trust where
|
||||
the command-line is verified.
|
||||
|
||||
Directly following the header (and with sector number padded to the next hash
|
||||
block boundary) are the hash blocks which are stored a depth at a time
|
||||
(starting from the root), sorted in order of increasing index.
|
||||
|
||||
The full specification of kernel parameters and on-disk metadata format
|
||||
is available at the cryptsetup project's wiki page
|
||||
http://code.google.com/p/cryptsetup/wiki/DMVerity
|
||||
|
||||
Status
|
||||
======
|
||||
V (for Valid) is returned if every check performed so far was valid.
|
||||
|
|
@ -174,21 +134,22 @@ If any check failed, C (for Corruption) is returned.
|
|||
|
||||
Example
|
||||
=======
|
||||
|
||||
Setup a device:
|
||||
dmsetup create vroot --table \
|
||||
"0 2097152 "\
|
||||
"verity 1 /dev/sda1 /dev/sda2 4096 4096 2097152 1 "\
|
||||
Set up a device:
|
||||
# dmsetup create vroot --readonly --table \
|
||||
"0 2097152 verity 1 /dev/sda1 /dev/sda2 4096 4096 262144 1 sha256 "\
|
||||
"4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 "\
|
||||
"1234000000000000000000000000000000000000000000000000000000000000"
|
||||
|
||||
A command line tool veritysetup is available to compute or verify
|
||||
the hash tree or activate the kernel driver. This is available from
|
||||
the LVM2 upstream repository and may be supplied as a package called
|
||||
device-mapper-verity-tools:
|
||||
git://sources.redhat.com/git/lvm2
|
||||
http://sourceware.org/git/?p=lvm2.git
|
||||
http://sourceware.org/cgi-bin/cvsweb.cgi/LVM2/verity?cvsroot=lvm2
|
||||
the hash tree or activate the kernel device. This is available from
|
||||
the cryptsetup upstream repository http://code.google.com/p/cryptsetup/
|
||||
(as a libcryptsetup extension).
|
||||
|
||||
veritysetup -a vroot /dev/sda1 /dev/sda2 \
|
||||
4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
Create hash on the device:
|
||||
# veritysetup format /dev/sda1 /dev/sda2
|
||||
...
|
||||
Root hash: 4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
|
||||
Activate the device:
|
||||
# veritysetup create vroot /dev/sda1 /dev/sda2 \
|
||||
4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
|
|
|
|||
|
|
@ -2416,6 +2416,8 @@ Your cooperation is appreciated.
|
|||
1 = /dev/raw/raw1 First raw I/O device
|
||||
2 = /dev/raw/raw2 Second raw I/O device
|
||||
...
|
||||
max minor number of raw device is set by kernel config
|
||||
MAX_RAW_DEVS or raw module parameter 'max_raw_devs'
|
||||
|
||||
163 char
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,23 @@
|
|||
Marvell Armada 370 and Armada XP Interrupt Controller
|
||||
-----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "marvell,mpic"
|
||||
- interrupt-controller: Identifies the node as an interrupt controller.
|
||||
- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
|
||||
The cell is the IRQ number
|
||||
- reg: Should contain PMIC registers location and length. First pair
|
||||
for the main interrupt registers, second pair for the per-CPU
|
||||
interrupt registers
|
||||
|
||||
Example:
|
||||
|
||||
mpic: interrupt-controller@d0020000 {
|
||||
compatible = "marvell,mpic";
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0xd0020000 0x1000>,
|
||||
<0xd0021000 0x1000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
Marvell Armada 370 and Armada XP Global Timers
|
||||
----------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "marvell,armada-370-xp-timer"
|
||||
- interrupts: Should contain the list of Global Timer interrupts
|
||||
- reg: Should contain the base address of the Global Timer registers
|
||||
|
||||
Optional properties:
|
||||
- marvell,timer-25Mhz: Tells whether the Global timer supports the 25
|
||||
Mhz fixed mode (available on Armada XP and not on Armada 370)
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
Marvell Armada 370 and Armada XP Platforms Device Tree Bindings
|
||||
---------------------------------------------------------------
|
||||
|
||||
Boards with a SoC of the Marvell Armada 370 and Armada XP families
|
||||
shall have the following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "marvell,armada-370-xp"
|
||||
|
||||
In addition, boards using the Marvell Armada 370 SoC shall have the
|
||||
following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "marvell,armada370"
|
||||
|
||||
In addition, boards using the Marvell Armada XP SoC shall have the
|
||||
following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "marvell,armadaxp"
|
||||
|
||||
|
|
@ -4,7 +4,7 @@ Required properties:
|
|||
- compatible: Should be "atmel,<chip>-aic"
|
||||
- interrupt-controller: Identifies the node as an interrupt controller.
|
||||
- interrupt-parent: For single AIC system, it is an empty property.
|
||||
- #interrupt-cells: The number of cells to define the interrupts. It sould be 2.
|
||||
- #interrupt-cells: The number of cells to define the interrupts. It sould be 3.
|
||||
The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
|
||||
The second cell is used to specify flags:
|
||||
bits[3:0] trigger type and level flags:
|
||||
|
|
@ -14,7 +14,10 @@ Required properties:
|
|||
8 = active low level-sensitive.
|
||||
Valid combinations are 1, 2, 3, 4, 8.
|
||||
Default flag for internal sources should be set to 4 (active high).
|
||||
The third cell is used to specify the irq priority from 0 (lowest) to 7
|
||||
(highest).
|
||||
- reg: Should contain AIC registers location and length
|
||||
- atmel,external-irqs: u32 array of external irqs.
|
||||
|
||||
Examples:
|
||||
/*
|
||||
|
|
@ -24,7 +27,7 @@ Examples:
|
|||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <3>;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
@ -34,5 +37,5 @@ Examples:
|
|||
dma: dma-controller@ffffec00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <21 4>;
|
||||
interrupts = <21 4 5>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
* TI Common Platform Interrupt Controller
|
||||
|
||||
Common Platform Interrupt Controller (cp_intc) is used on
|
||||
OMAP-L1x SoCs and can support several configurable number
|
||||
of interrupts.
|
||||
|
||||
Main node required properties:
|
||||
|
||||
- compatible : should be:
|
||||
"ti,cp-intc"
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The type shall be a <u32> and the value shall be 1.
|
||||
|
||||
The cell contains the interrupt number in the range [0-128].
|
||||
- ti,intc-size: Number of interrupts handled by the interrupt controller.
|
||||
- reg: physical base address and size of the intc registers map.
|
||||
|
||||
Example:
|
||||
|
||||
intc: interrupt-controller@1 {
|
||||
compatible = "ti,cp-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
ti,intc-size = <101>;
|
||||
reg = <0xfffee000 0x2000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
MVEBU System Controller
|
||||
-----------------------
|
||||
MVEBU (Marvell SOCs: Armada 370/XP, Dove, mv78xx0, Kirkwood, Orion5x)
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: one of:
|
||||
- "marvell,orion-system-controller"
|
||||
- "marvell,armada-370-xp-system-controller"
|
||||
- reg: Should contain system controller registers location and length.
|
||||
|
||||
Example:
|
||||
|
||||
system-controller@d0018200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0xd0018200 0x500>;
|
||||
};
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
Olimex i.MX Platforms Device Tree Bindings
|
||||
------------------------------------------
|
||||
|
||||
i.MX23 Olinuxino Low Cost Board
|
||||
Required root node properties:
|
||||
- compatible = "olimex,imx23-olinuxino", "fsl,imx23";
|
||||
|
|
@ -47,3 +47,9 @@ Boards:
|
|||
|
||||
- AM335X EVM : Software Developement Board for AM335x
|
||||
compatible = "ti,am335x-evm", "ti,am33xx", "ti,omap3"
|
||||
|
||||
- AM335X Bone : Low cost community board
|
||||
compatible = "ti,am335x-bone", "ti,am33xx", "ti,omap3"
|
||||
|
||||
- OMAP5 EVM : Evaluation Module
|
||||
compatible = "ti,omap5-evm", "ti,omap5"
|
||||
|
|
|
|||
|
|
@ -13,11 +13,17 @@ Required properties:
|
|||
Optional properties:
|
||||
|
||||
- arm,primecell-periphid : Value to override the h/w value with
|
||||
- clocks : From common clock binding. First clock is phandle to clock for apb
|
||||
pclk. Additional clocks are optional and specific to those peripherals.
|
||||
- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
|
||||
|
||||
Example:
|
||||
|
||||
serial@fff36000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00341011>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and
|
|||
|
||||
Example:
|
||||
|
||||
emc@7000f400 {
|
||||
memory-controller@7000f400 {
|
||||
#address-cells = < 1 >;
|
||||
#size-cells = < 0 >;
|
||||
compatible = "nvidia,tegra20-emc";
|
||||
|
|
@ -8,7 +8,7 @@ Required properties:
|
|||
- interrupts : Should contain MC General interrupt.
|
||||
|
||||
Example:
|
||||
mc {
|
||||
memory-controller@0x7000f000 {
|
||||
compatible = "nvidia,tegra20-mc";
|
||||
reg = <0x7000f000 0x024
|
||||
0x7000f03c 0x3c4>;
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ Required properties:
|
|||
- interrupts : Should contain MC General interrupt.
|
||||
|
||||
Example:
|
||||
mc {
|
||||
memory-controller {
|
||||
compatible = "nvidia,tegra30-mc";
|
||||
reg = <0x7000f000 0x010
|
||||
0x7000f03c 0x1b4
|
||||
|
|
|
|||
|
|
@ -0,0 +1,17 @@
|
|||
Device Tree Clock bindings for Calxeda highbank platform
|
||||
|
||||
This binding uses the common clock binding[1].
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be one of the following:
|
||||
"calxeda,hb-pll-clock" - for a PLL clock
|
||||
"calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
|
||||
A9 clock.
|
||||
"calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
|
||||
"calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
|
||||
- reg : shall be the control register offset from SYSREGs base for the clock.
|
||||
- clocks : shall be the input parent clock phandle for the clock. This is
|
||||
either an oscillator or a pll output.
|
||||
- #clock-cells : from common clock binding; shall be set to 0.
|
||||
|
|
@ -0,0 +1,117 @@
|
|||
This binding is a work-in-progress, and are based on some experimental
|
||||
work by benh[1].
|
||||
|
||||
Sources of clock signal can be represented by any node in the device
|
||||
tree. Those nodes are designated as clock providers. Clock consumer
|
||||
nodes use a phandle and clock specifier pair to connect clock provider
|
||||
outputs to clock inputs. Similar to the gpio specifiers, a clock
|
||||
specifier is an array of one more more cells identifying the clock
|
||||
output on a device. The length of a clock specifier is defined by the
|
||||
value of a #clock-cells property in the clock provider node.
|
||||
|
||||
[1] http://patchwork.ozlabs.org/patch/31551/
|
||||
|
||||
==Clock providers==
|
||||
|
||||
Required properties:
|
||||
#clock-cells: Number of cells in a clock specifier; Typically 0 for nodes
|
||||
with a single clock output and 1 for nodes with multiple
|
||||
clock outputs.
|
||||
|
||||
Optional properties:
|
||||
clock-output-names: Recommended to be a list of strings of clock output signal
|
||||
names indexed by the first cell in the clock specifier.
|
||||
However, the meaning of clock-output-names is domain
|
||||
specific to the clock provider, and is only provided to
|
||||
encourage using the same meaning for the majority of clock
|
||||
providers. This format may not work for clock providers
|
||||
using a complex clock specifier format. In those cases it
|
||||
is recommended to omit this property and create a binding
|
||||
specific names property.
|
||||
|
||||
Clock consumer nodes must never directly reference
|
||||
the provider's clock-output-names property.
|
||||
|
||||
For example:
|
||||
|
||||
oscillator {
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "ckil", "ckih";
|
||||
};
|
||||
|
||||
- this node defines a device with two clock outputs, the first named
|
||||
"ckil" and the second named "ckih". Consumer nodes always reference
|
||||
clocks by index. The names should reflect the clock output signal
|
||||
names for the device.
|
||||
|
||||
==Clock consumers==
|
||||
|
||||
Required properties:
|
||||
clocks: List of phandle and clock specifier pairs, one pair
|
||||
for each clock input to the device. Note: if the
|
||||
clock provider specifies '0' for #clock-cells, then
|
||||
only the phandle portion of the pair will appear.
|
||||
|
||||
Optional properties:
|
||||
clock-names: List of clock input name strings sorted in the same
|
||||
order as the clocks property. Consumers drivers
|
||||
will use clock-names to match clock input names
|
||||
with clocks specifiers.
|
||||
clock-ranges: Empty property indicating that child nodes can inherit named
|
||||
clocks from this node. Useful for bus nodes to provide a
|
||||
clock to their children.
|
||||
|
||||
For example:
|
||||
|
||||
device {
|
||||
clocks = <&osc 1>, <&ref 0>;
|
||||
clock-names = "baud", "register";
|
||||
};
|
||||
|
||||
|
||||
This represents a device with two clock inputs, named "baud" and "register".
|
||||
The baud clock is connected to output 1 of the &osc device, and the register
|
||||
clock is connected to output 0 of the &ref.
|
||||
|
||||
==Example==
|
||||
|
||||
/* external oscillator */
|
||||
osc: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <32678>;
|
||||
clock-output-names = "osc";
|
||||
};
|
||||
|
||||
/* phase-locked-loop device, generates a higher frequency clock
|
||||
* from the external oscillator reference */
|
||||
pll: pll@4c000 {
|
||||
compatible = "vendor,some-pll-interface"
|
||||
#clock-cells = <1>;
|
||||
clocks = <&osc 0>;
|
||||
clock-names = "ref";
|
||||
reg = <0x4c000 0x1000>;
|
||||
clock-output-names = "pll", "pll-switched";
|
||||
};
|
||||
|
||||
/* UART, using the low frequency oscillator for the baud clock,
|
||||
* and the high frequency switched PLL output for register
|
||||
* clocking */
|
||||
uart@a000 {
|
||||
compatible = "fsl,imx-uart";
|
||||
reg = <0xa000 0x1000>;
|
||||
interrupts = <33>;
|
||||
clocks = <&osc 0>, <&pll 1>;
|
||||
clock-names = "baud", "register";
|
||||
};
|
||||
|
||||
This DT fragment defines three devices: an external oscillator to provide a
|
||||
low-frequency reference clock, a PLL device to generate a higher frequency
|
||||
clock signal, and a UART.
|
||||
|
||||
* The oscillator is fixed-frequency, and provides one clock output, named "osc".
|
||||
* The PLL is both a clock provider and a clock consumer. It uses the clock
|
||||
signal generated by the external oscillator, and provides two output signals
|
||||
("pll" and "pll-switched").
|
||||
* The UART has its baud clock connected the external oscillator and its
|
||||
register clock connected to the PLL clock (the "pll-switched" signal)
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
Binding for simple fixed-rate clock sources.
|
||||
|
||||
This binding uses the common clock binding[1].
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be "fixed-clock".
|
||||
- #clock-cells : from common clock binding; shall be set to 0.
|
||||
- clock-frequency : frequency of clock in Hz. Should be a single cell.
|
||||
|
||||
Optional properties:
|
||||
- gpios : From common gpio binding; gpio connection to clock enable pin.
|
||||
- clock-output-names : From common clock binding.
|
||||
|
||||
Example:
|
||||
clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
* Freescale MXS LCD Interface (LCDIF)
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,<chip>-lcdif". Supported chips include
|
||||
imx23 and imx28.
|
||||
- reg: Address and length of the register set for lcdif
|
||||
- interrupts: Should contain lcdif interrupts
|
||||
|
||||
Optional properties:
|
||||
- panel-enable-gpios : Should specify the gpio for panel enable
|
||||
|
||||
Examples:
|
||||
|
||||
lcdif@80030000 {
|
||||
compatible = "fsl,imx28-lcdif";
|
||||
reg = <0x80030000 2000>;
|
||||
interrupts = <38 86>;
|
||||
panel-enable-gpios = <&gpio3 30 0>;
|
||||
};
|
||||
|
|
@ -8,8 +8,16 @@ Required properties:
|
|||
by low 16 pins and the second one is for high 16 pins.
|
||||
- gpio-controller : Marks the device node as a gpio controller.
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and
|
||||
the second cell is used to specify optional parameters (currently
|
||||
unused).
|
||||
the second cell is used to specify the gpio polarity:
|
||||
0 = active high
|
||||
1 = active low
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells : Should be 2. The first cell is the GPIO number.
|
||||
The second cell bits[3:0] is used to specify trigger type and level flags:
|
||||
1 = low-to-high edge triggered.
|
||||
2 = high-to-low edge triggered.
|
||||
4 = active high level-sensitive.
|
||||
8 = active low level-sensitive.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
@ -19,4 +27,6 @@ gpio0: gpio@73f84000 {
|
|||
interrupts = <50 51>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,8 +13,9 @@ Required properties for GPIO node:
|
|||
- interrupts : Should be the port interrupt shared by all 32 pins.
|
||||
- gpio-controller : Marks the device node as a gpio controller.
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and
|
||||
the second cell is used to specify optional parameters (currently
|
||||
unused).
|
||||
the second cell is used to specify the gpio polarity:
|
||||
0 = active high
|
||||
1 = active low
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells : Should be 2. The first cell is the GPIO number.
|
||||
The second cell bits[3:0] is used to specify trigger type and level flags:
|
||||
|
|
|
|||
|
|
@ -26,6 +26,6 @@ Example:
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
supports-sleepmode;
|
||||
st,supports-sleepmode;
|
||||
gpio-bank = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,4 +55,4 @@ run-control {
|
|||
gpios = <&mpc8572 7 0>;
|
||||
default-state = "on";
|
||||
};
|
||||
}
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
Required properties:
|
||||
- compatible : "fsl,mma8450".
|
||||
- reg: the I2C address of MMA8450
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,21 @@
|
|||
NVIDIA Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit)
|
||||
|
||||
Required properties:
|
||||
- compatible : "nvidia,tegra30-smmu"
|
||||
- reg : Should contain 3 register banks(address and length) for each
|
||||
of the SMMU register blocks.
|
||||
- interrupts : Should contain MC General interrupt.
|
||||
- nvidia,#asids : # of ASIDs
|
||||
- dma-window : IOVA start address and length.
|
||||
- nvidia,ahb : phandle to the ahb bus connected to SMMU.
|
||||
|
||||
Example:
|
||||
smmu {
|
||||
compatible = "nvidia,tegra30-smmu";
|
||||
reg = <0x7000f010 0x02c
|
||||
0x7000f1f0 0x010
|
||||
0x7000f228 0x05c>;
|
||||
nvidia,#asids = <4>; /* # of ASIDs */
|
||||
dma-window = <0 0x40000000>; /* IOVA start & length */
|
||||
nvidia,ahb = <&ahb>;
|
||||
};
|
||||
|
|
@ -46,8 +46,8 @@ Examples:
|
|||
|
||||
ecspi@70010000 { /* ECSPI1 */
|
||||
fsl,spi-num-chipselects = <2>;
|
||||
cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
|
||||
<&gpio3 25 0>; /* GPIO4_25 */
|
||||
cs-gpios = <&gpio4 24 0>, /* GPIO4_24 */
|
||||
<&gpio4 25 0>; /* GPIO4_25 */
|
||||
status = "okay";
|
||||
|
||||
pmic: mc13892@0 {
|
||||
|
|
|
|||
|
|
@ -17,18 +17,46 @@ Required properties:
|
|||
device need to be present. The definition for each of these nodes is defined
|
||||
using the standard binding for regulators found at
|
||||
Documentation/devicetree/bindings/regulator/regulator.txt.
|
||||
The regulator is matched with the regulator-compatible.
|
||||
|
||||
The valid names for regulators are:
|
||||
The valid regulator-compatible values are:
|
||||
tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
|
||||
vaux2, vaux33, vmmc
|
||||
tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,
|
||||
ldo6, ldo7, ldo8
|
||||
|
||||
- xxx-supply: Input voltage supply regulator.
|
||||
These entries are require if regulators are enabled for a device. Missing of these
|
||||
properties can cause the regulator registration fails.
|
||||
If some of input supply is powered through battery or always-on supply then
|
||||
also it is require to have these parameters with proper node handle of always
|
||||
on power supply.
|
||||
tps65910:
|
||||
vcc1-supply: VDD1 input.
|
||||
vcc2-supply: VDD2 input.
|
||||
vcc3-supply: VAUX33 and VMMC input.
|
||||
vcc4-supply: VAUX1 and VAUX2 input.
|
||||
vcc5-supply: VPLL and VDAC input.
|
||||
vcc6-supply: VDIG1 and VDIG2 input.
|
||||
vcc7-supply: VRTC input.
|
||||
vccio-supply: VIO input.
|
||||
tps65911:
|
||||
vcc1-supply: VDD1 input.
|
||||
vcc2-supply: VDD2 input.
|
||||
vcc3-supply: LDO6, LDO7 and LDO8 input.
|
||||
vcc4-supply: LDO5 input.
|
||||
vcc5-supply: LDO3 and LDO4 input.
|
||||
vcc6-supply: LDO1 and LDO2 input.
|
||||
vcc7-supply: VRTC input.
|
||||
vccio-supply: VIO input.
|
||||
|
||||
Optional properties:
|
||||
- ti,vmbch-threshold: (tps65911) main battery charged threshold
|
||||
comparator. (see VMBCH_VSEL in TPS65910 datasheet)
|
||||
- ti,vmbch2-threshold: (tps65911) main battery discharged threshold
|
||||
comparator. (see VMBCH_VSEL in TPS65910 datasheet)
|
||||
- ti,en-ck32k-xtal: enable external 32-kHz crystal oscillator (see CK32K_CTRL
|
||||
in TPS6591X datasheet)
|
||||
- ti,en-gpio-sleep: enable sleep control for gpios
|
||||
There should be 9 entries here, one for each gpio.
|
||||
|
||||
|
|
@ -56,74 +84,110 @@ Example:
|
|||
|
||||
ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
|
||||
|
||||
vcc1-supply = <®_parent>;
|
||||
vcc2-supply = <&some_reg>;
|
||||
vcc3-supply = <...>;
|
||||
vcc4-supply = <...>;
|
||||
vcc5-supply = <...>;
|
||||
vcc6-supply = <...>;
|
||||
vcc7-supply = <...>;
|
||||
vccio-supply = <...>;
|
||||
|
||||
regulators {
|
||||
vdd1_reg: vdd1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vdd1_reg: regulator@0 {
|
||||
regulator-compatible = "vdd1";
|
||||
reg = <0>;
|
||||
regulator-min-microvolt = < 600000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
vdd2_reg: vdd2 {
|
||||
vdd2_reg: regulator@1 {
|
||||
regulator-compatible = "vdd2";
|
||||
reg = <1>;
|
||||
regulator-min-microvolt = < 600000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
ti,regulator-ext-sleep-control = <4>;
|
||||
};
|
||||
vddctrl_reg: vddctrl {
|
||||
vddctrl_reg: regulator@2 {
|
||||
regulator-compatible = "vddctrl";
|
||||
reg = <2>;
|
||||
regulator-min-microvolt = < 600000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
vio_reg: vio {
|
||||
vio_reg: regulator@3 {
|
||||
regulator-compatible = "vio";
|
||||
reg = <3>;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
ti,regulator-ext-sleep-control = <1>;
|
||||
};
|
||||
ldo1_reg: ldo1 {
|
||||
ldo1_reg: regulator@4 {
|
||||
regulator-compatible = "ldo1";
|
||||
reg = <4>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo2_reg: ldo2 {
|
||||
ldo2_reg: regulator@5 {
|
||||
regulator-compatible = "ldo2";
|
||||
reg = <5>;
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo3_reg: ldo3 {
|
||||
ldo3_reg: regulator@6 {
|
||||
regulator-compatible = "ldo3";
|
||||
reg = <6>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo4_reg: ldo4 {
|
||||
ldo4_reg: regulator@7 {
|
||||
regulator-compatible = "ldo4";
|
||||
reg = <7>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo5_reg: ldo5 {
|
||||
ldo5_reg: regulator@8 {
|
||||
regulator-compatible = "ldo5";
|
||||
reg = <8>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo6_reg: ldo6 {
|
||||
ldo6_reg: regulator@9 {
|
||||
regulator-compatible = "ldo6";
|
||||
reg = <9>;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
ti,regulator-ext-sleep-control = <0>;
|
||||
};
|
||||
ldo7_reg: ldo7 {
|
||||
ldo7_reg: regulator@10 {
|
||||
regulator-compatible = "ldo7";
|
||||
reg = <10>;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
ti,regulator-ext-sleep-control = <1>;
|
||||
};
|
||||
ldo8_reg: ldo8 {
|
||||
ldo8_reg: regulator@11 {
|
||||
regulator-compatible = "ldo8";
|
||||
reg = <11>;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
|
|
|
|||
|
|
@ -3,21 +3,22 @@
|
|||
The Enhanced Secure Digital Host Controller provides an interface
|
||||
for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the sdhci-esdhc driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be
|
||||
"fsl,<chip>-esdhc", "fsl,esdhc"
|
||||
- reg : should contain eSDHC registers location and length.
|
||||
- interrupts : should contain eSDHC interrupt.
|
||||
- interrupt-parent : interrupt source phandle.
|
||||
- clock-frequency : specifies eSDHC base clock frequency.
|
||||
- sdhci,wp-inverted : (optional) specifies that eSDHC controller
|
||||
reports inverted write-protect state; New devices should use
|
||||
the generic "wp-inverted" property.
|
||||
- sdhci,1-bit-only : (optional) specifies that a controller can
|
||||
only handle 1-bit data transfers. New devices should use the
|
||||
generic "bus-width = <1>" property.
|
||||
- sdhci,auto-cmd12: (optional) specifies that a controller can
|
||||
only handle auto CMD12.
|
||||
|
||||
Optional properties:
|
||||
- sdhci,wp-inverted : specifies that eSDHC controller reports
|
||||
inverted write-protect state; New devices should use the generic
|
||||
"wp-inverted" property.
|
||||
- sdhci,1-bit-only : specifies that a controller can only handle
|
||||
1-bit data transfers. New devices should use the generic
|
||||
"bus-width = <1>" property.
|
||||
- sdhci,auto-cmd12: specifies that a controller can only handle auto
|
||||
CMD12.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -3,17 +3,15 @@
|
|||
The Enhanced Secure Digital Host Controller on Freescale i.MX family
|
||||
provides an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "fsl,<chip>-esdhc"
|
||||
- reg : Should contain eSDHC registers location and length
|
||||
- interrupts : Should contain eSDHC interrupt
|
||||
|
||||
Optional properties:
|
||||
- non-removable : Indicate the card is wired to host permanently
|
||||
- fsl,cd-internal : Indicate to use controller internal card detection
|
||||
- fsl,wp-internal : Indicate to use controller internal write protection
|
||||
- cd-gpios : Specify GPIOs for card detection
|
||||
- wp-gpios : Specify GPIOs for write protection
|
||||
|
||||
Examples:
|
||||
|
||||
|
|
@ -29,6 +27,6 @@ esdhc@70008000 {
|
|||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70008000 0x4000>;
|
||||
interrupts = <2>;
|
||||
cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
|
||||
wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
|
||||
cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
|
||||
wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,8 +1,9 @@
|
|||
MMC/SD/SDIO slot directly connected to a SPI bus
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the mmc_spi driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "mmc-spi-slot".
|
||||
- reg : should specify SPI address (chip-select number).
|
||||
- spi-max-frequency : maximum frequency for this device (Hz).
|
||||
- voltage-ranges : two cells are required, first cell specifies minimum
|
||||
slot voltage (mV), second cell specifies maximum slot voltage (mV).
|
||||
|
|
@ -11,8 +12,7 @@ Required properties:
|
|||
Optional properties:
|
||||
- gpios : may specify GPIOs in this order: Card-Detect GPIO,
|
||||
Write-Protect GPIO. Note that this does not follow the
|
||||
binding from mmc.txt, for historic reasons.
|
||||
- interrupts : the interrupt of a card detect interrupt.
|
||||
binding from mmc.txt, for historical reasons.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
|
||||
|
|
|
|||
|
|
@ -2,13 +2,17 @@ These properties are common to multiple MMC host controllers. Any host
|
|||
that requires the respective functionality should implement them using
|
||||
these definitions.
|
||||
|
||||
Interpreted by the OF core:
|
||||
- reg: Registers location and length.
|
||||
- interrupts: Interrupts used by the MMC controller.
|
||||
|
||||
Required properties:
|
||||
- bus-width: Number of data lines, can be <1>, <4>, or <8>
|
||||
|
||||
Optional properties:
|
||||
- cd-gpios : Specify GPIOs for card detection, see gpio binding
|
||||
- wp-gpios : Specify GPIOs for write protection, see gpio binding
|
||||
- cd-inverted: when present, polarity on the wp gpio line is inverted
|
||||
- cd-gpios: Specify GPIOs for card detection, see gpio binding
|
||||
- wp-gpios: Specify GPIOs for write protection, see gpio binding
|
||||
- cd-inverted: when present, polarity on the cd gpio line is inverted
|
||||
- wp-inverted: when present, polarity on the wp gpio line is inverted
|
||||
- non-removable: non-removable slot (like eMMC)
|
||||
- max-frequency: maximum operating clock frequency
|
||||
|
|
|
|||
|
|
@ -1,19 +1,15 @@
|
|||
* ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1
|
||||
|
||||
The ARM PrimeCell MMCI PL180 and PL181 provides and interface for
|
||||
The ARM PrimeCell MMCI PL180 and PL181 provides an interface for
|
||||
reading and writing to MultiMedia and SD cards alike.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the mmci driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : contains "arm,pl18x", "arm,primecell".
|
||||
- reg : contains pl18x registers and length.
|
||||
- interrupts : contains the device IRQ(s).
|
||||
- arm,primecell-periphid : contains the PrimeCell Peripheral ID.
|
||||
|
||||
Optional properties:
|
||||
- wp-gpios : contains any write protect (ro) gpios
|
||||
- cd-gpios : contains any card detection gpios
|
||||
- cd-inverted : indicates whether the cd gpio is inverted
|
||||
- max-frequency : contains the maximum operating frequency
|
||||
- bus-width : number of data lines, can be <1>, <4>, or <8>
|
||||
- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable
|
||||
- mmc-cap-sd-highspeed : indicates whether SD is high speed capable
|
||||
|
|
|
|||
|
|
@ -3,16 +3,14 @@
|
|||
The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
|
||||
to support MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties in mmc.txt
|
||||
and the properties used by the mxsmmc driver.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,<chip>-mmc". The supported chips include
|
||||
imx23 and imx28.
|
||||
- reg: Should contain registers location and length
|
||||
- interrupts: Should contain ERROR and DMA interrupts
|
||||
- fsl,ssp-dma-channel: APBH DMA channel for the SSP
|
||||
- bus-width: Number of data lines, can be <1>, <4>, or <8>
|
||||
|
||||
Optional properties:
|
||||
- wp-gpios: Specify GPIOs for write protection
|
||||
|
||||
Examples:
|
||||
|
||||
|
|
|
|||
|
|
@ -3,15 +3,13 @@
|
|||
This controller on Tegra family SoCs provides an interface for MMC, SD,
|
||||
and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the sdhci-tegra driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "nvidia,<chip>-sdhci"
|
||||
- reg : Should contain SD/MMC registers location and length
|
||||
- interrupts : Should contain SD/MMC interrupt
|
||||
- bus-width : Number of data lines, can be <1>, <4>, or <8>
|
||||
|
||||
Optional properties:
|
||||
- cd-gpios : Specify GPIOs for card detection
|
||||
- wp-gpios : Specify GPIOs for write protection
|
||||
- power-gpios : Specify GPIOs for power control
|
||||
|
||||
Example:
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
* Marvell sdhci-pxa v2/v3 controller
|
||||
|
||||
This file documents differences between the core properties in mmc.txt
|
||||
and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "mrvl,pxav2-mmc" or "mrvl,pxav3-mmc".
|
||||
|
||||
Optional properties:
|
||||
- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
|
||||
|
||||
Example:
|
||||
|
||||
sdhci@d4280800 {
|
||||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xd4280800 0x800>;
|
||||
bus-width = <8>;
|
||||
interrupts = <27>;
|
||||
non-removable;
|
||||
mrvl,clk-delay-cycles = <31>;
|
||||
};
|
||||
|
|
@ -3,21 +3,20 @@
|
|||
The Highspeed MMC Host Controller on TI OMAP family
|
||||
provides an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the omap_hsmmc driver.
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
Should be "ti,omap2-hsmmc", for OMAP2 controllers
|
||||
Should be "ti,omap3-hsmmc", for OMAP3 controllers
|
||||
Should be "ti,omap4-hsmmc", for OMAP4 controllers
|
||||
- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1
|
||||
- reg : should contain hsmmc registers location and length
|
||||
|
||||
Optional properties:
|
||||
ti,dual-volt: boolean, supports dual voltage cards
|
||||
<supply-name>-supply: phandle to the regulator device tree node
|
||||
"supply-name" examples are "vmmc", "vmmc_aux" etc
|
||||
bus-width: Number of data lines, default assumed is 1 if the property is missing.
|
||||
cd-gpios: GPIOs for card detection
|
||||
wp-gpios: GPIOs for write protection
|
||||
ti,non-removable: non-removable slot (like eMMC)
|
||||
ti,needs-special-reset: Requires a special softreset sequence
|
||||
|
||||
|
|
|
|||
|
|
@ -35,4 +35,4 @@ flash@0 {
|
|||
uimage@100000 {
|
||||
reg = <0x0100000 0x200000>;
|
||||
};
|
||||
];
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,29 @@
|
|||
The Broadcom BCM87XX devices are a family of 10G Ethernet PHYs. They
|
||||
have these bindings in addition to the standard PHY bindings.
|
||||
|
||||
Compatible: Should contain "broadcom,bcm8706" or "broadcom,bcm8727" and
|
||||
"ethernet-phy-ieee802.3-c45"
|
||||
|
||||
Optional Properties:
|
||||
|
||||
- broadcom,c45-reg-init : one of more sets of 4 cells. The first cell
|
||||
is the MDIO Manageable Device (MMD) address, the second a register
|
||||
address within the MMD, the third cell contains a mask to be ANDed
|
||||
with the existing register value, and the fourth cell is ORed with
|
||||
he result to yield the new register value. If the third cell has a
|
||||
value of zero, no read of the existing value is performed.
|
||||
|
||||
Example:
|
||||
|
||||
ethernet-phy@5 {
|
||||
reg = <5>;
|
||||
compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <12 8>; /* Pin 12, active low */
|
||||
/*
|
||||
* Set PMD Digital Control Register for
|
||||
* GPIO[1] Tx/Rx
|
||||
* GPIO[0] R64 Sync Acquired
|
||||
*/
|
||||
broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
|
||||
};
|
||||
|
|
@ -11,6 +11,9 @@ Required properties:
|
|||
|
||||
- reg : Offset and length of the register set for this device
|
||||
- interrupts : Interrupt tuple for this device
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency : The oscillator frequency driving the flexcan device
|
||||
|
||||
Example:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,41 @@
|
|||
* Texas Instruments Davinci EMAC
|
||||
|
||||
This file provides information, what the device node
|
||||
for the davinci_emac interface contains.
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,davinci-dm6467-emac";
|
||||
- reg: Offset and length of the register set for the device
|
||||
- ti,davinci-ctrl-reg-offset: offset to control register
|
||||
- ti,davinci-ctrl-mod-reg-offset: offset to control module register
|
||||
- ti,davinci-ctrl-ram-offset: offset to control module ram
|
||||
- ti,davinci-ctrl-ram-size: size of control module ram
|
||||
- ti,davinci-rmii-en: use RMII
|
||||
- ti,davinci-no-bd-ram: has the emac controller BD RAM
|
||||
- phy-handle: Contains a phandle to an Ethernet PHY.
|
||||
if not, davinci_emac driver defaults to 100/FULL
|
||||
- interrupts: interrupt mapping for the davinci emac interrupts sources:
|
||||
4 sources: <Receive Threshold Interrupt
|
||||
Receive Interrupt
|
||||
Transmit Interrupt
|
||||
Miscellaneous Interrupt>
|
||||
|
||||
Optional properties:
|
||||
- local-mac-address : 6 bytes, mac address
|
||||
|
||||
Example (enbw_cmc board):
|
||||
eth0: emac@1e20000 {
|
||||
compatible = "ti,davinci-dm6467-emac";
|
||||
reg = <0x220000 0x4000>;
|
||||
ti,davinci-ctrl-reg-offset = <0x3000>;
|
||||
ti,davinci-ctrl-mod-reg-offset = <0x2000>;
|
||||
ti,davinci-ctrl-ram-offset = <0>;
|
||||
ti,davinci-ctrl-ram-size = <0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <33
|
||||
34
|
||||
35
|
||||
36
|
||||
>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
|
@ -7,10 +7,14 @@ Required properties:
|
|||
- phy-mode : String, operation mode of the PHY interface.
|
||||
Supported values are: "mii", "gmii", "sgmii", "tbi", "rmii",
|
||||
"rgmii", "rgmii-id", "rgmii-rxid", "rgmii-txid", "rtbi", "smii".
|
||||
- phy-reset-gpios : Should specify the gpio for phy reset
|
||||
|
||||
Optional properties:
|
||||
- local-mac-address : 6 bytes, mac address
|
||||
- phy-reset-gpios : Should specify the gpio for phy reset
|
||||
- phy-reset-duration : Reset duration in milliseconds. Should present
|
||||
only if property "phy-reset-gpios" is available. Missing the property
|
||||
will have the duration be 1 millisecond. Numbers greater than 1000 are
|
||||
invalid and 1 millisecond will be used instead.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
@ -19,6 +23,6 @@ ethernet@83fec000 {
|
|||
reg = <0x83fec000 0x4000>;
|
||||
interrupts = <87>;
|
||||
phy-mode = "mii";
|
||||
phy-reset-gpios = <&gpio1 14 0>; /* GPIO2_14 */
|
||||
phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */
|
||||
local-mac-address = [00 04 9F 01 1B B9];
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,10 +14,20 @@ Required properties:
|
|||
- linux,phandle : phandle for this node; likely referenced by an
|
||||
ethernet controller node.
|
||||
|
||||
Optional Properties:
|
||||
|
||||
- compatible: Compatible list, may contain
|
||||
"ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
|
||||
PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
|
||||
specifications. If neither of these are specified, the default is to
|
||||
assume clause 22. The compatible list may also contain other
|
||||
elements.
|
||||
|
||||
Example:
|
||||
|
||||
ethernet-phy@0 {
|
||||
linux,phandle = <2452000>
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
linux,phandle = <2452000>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <35 1>;
|
||||
reg = <0>;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,8 @@
|
|||
* STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "st,spear600-gmac"
|
||||
- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
|
||||
For backwards compatibility: "st,spear600-gmac" is also supported.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupt-parent: Should be the phandle for the interrupt controller
|
||||
that services interrupts for this device
|
||||
|
|
|
|||
|
|
@ -1626,3 +1626,5 @@ MX6Q_PAD_SD2_DAT3__PCIE_CTRL_MUX_11 1587
|
|||
MX6Q_PAD_SD2_DAT3__GPIO_1_12 1588
|
||||
MX6Q_PAD_SD2_DAT3__SJC_DONE 1589
|
||||
MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 1590
|
||||
MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID 1591
|
||||
MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID 1592
|
||||
|
|
|
|||
|
|
@ -0,0 +1,93 @@
|
|||
One-register-per-pin type device tree based pinctrl driver
|
||||
|
||||
Required properties:
|
||||
- compatible : "pinctrl-single"
|
||||
|
||||
- reg : offset and length of the register set for the mux registers
|
||||
|
||||
- pinctrl-single,register-width : pinmux register access width in bits
|
||||
|
||||
- pinctrl-single,function-mask : mask of allowed pinmux function bits
|
||||
in the pinmux register
|
||||
|
||||
Optional properties:
|
||||
- pinctrl-single,function-off : function off mode for disabled state if
|
||||
available and same for all registers; if not specified, disabling of
|
||||
pin functions is ignored
|
||||
|
||||
This driver assumes that there is only one register for each pin,
|
||||
and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt
|
||||
document in this directory.
|
||||
|
||||
The pin configuration nodes for pinctrl-single are specified as pinctrl
|
||||
register offset and value pairs using pinctrl-single,pins. Only the bits
|
||||
specified in pinctrl-single,function-mask are updated. For example, setting
|
||||
a pin for a device could be done with:
|
||||
|
||||
pinctrl-single,pins = <0xdc 0x118>;
|
||||
|
||||
Where 0xdc is the offset from the pinctrl register base address for the
|
||||
device pinctrl register, and 0x118 contains the desired value of the
|
||||
pinctrl register. See the device example and static board pins example
|
||||
below for more information.
|
||||
|
||||
Example:
|
||||
|
||||
/* SoC common file */
|
||||
|
||||
/* first controller instance for pins in core domain */
|
||||
pmx_core: pinmux@4a100040 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x4a100040 0x0196>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xffff>;
|
||||
};
|
||||
|
||||
/* second controller instance for pins in wkup domain */
|
||||
pmx_wkup: pinmux@4a31e040 {
|
||||
compatible = "pinctrl-single;
|
||||
reg = <0x4a31e040 0x0038>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xffff>;
|
||||
};
|
||||
|
||||
|
||||
/* board specific .dts file */
|
||||
|
||||
&pmx_core {
|
||||
|
||||
/*
|
||||
* map all board specific static pins enabled by the pinctrl driver
|
||||
* itself during the boot (or just set them up in the bootloader)
|
||||
*/
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&board_pins>;
|
||||
|
||||
board_pins: pinmux_board_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x6c 0xf
|
||||
0x6e 0xf
|
||||
0x70 0xf
|
||||
0x72 0xf
|
||||
>;
|
||||
};
|
||||
|
||||
/* map uart2 pins */
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd8 0x118
|
||||
0xda 0
|
||||
0xdc 0x118
|
||||
0xde 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
|
@ -10,6 +10,7 @@ Optional properties:
|
|||
If this property is missing, the default assumed is Active low.
|
||||
- gpio-open-drain: GPIO is open drain type.
|
||||
If this property is missing then default assumption is false.
|
||||
-vin-supply: Input supply name.
|
||||
|
||||
Any property defined as part of the core regulator
|
||||
binding, defined in regulator.txt, can also be used.
|
||||
|
|
@ -29,4 +30,5 @@ Example:
|
|||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
gpio-open-drain;
|
||||
vin-supply = <&parent_reg>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -10,6 +10,11 @@ Optional properties:
|
|||
- regulator-always-on: boolean, regulator should never be disabled
|
||||
- regulator-boot-on: bootloader/firmware enabled regulator
|
||||
- <name>-supply: phandle to the parent supply/regulator node
|
||||
- regulator-ramp-delay: ramp delay for regulator(in uV/uS)
|
||||
- regulator-compatible: If a regulator chip contains multiple
|
||||
regulators, and if the chip's binding contains a child node that
|
||||
describes each regulator, then this property indicates which regulator
|
||||
this child node is intended to configure.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,91 @@
|
|||
TPS65217 family of regulators
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,tps65217"
|
||||
- reg: I2C slave address
|
||||
- regulators: list of regulators provided by this controller, must be named
|
||||
after their hardware counterparts: dcdc[1-3] and ldo[1-4]
|
||||
- regulators: This is the list of child nodes that specify the regulator
|
||||
initialization data for defined regulators. Not all regulators for the given
|
||||
device need to be present. The definition for each of these nodes is defined
|
||||
using the standard binding for regulators found at
|
||||
Documentation/devicetree/bindings/regulator/regulator.txt.
|
||||
|
||||
The valid names for regulators are:
|
||||
tps65217: dcdc1, dcdc2, dcdc3, ldo1, ldo2, ldo3 and ldo4
|
||||
|
||||
Each regulator is defined using the standard binding for regulators.
|
||||
|
||||
Example:
|
||||
|
||||
tps: tps@24 {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "dcdc1";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "dcdc2";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "dcdc3";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "ldo1";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo2";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -6,8 +6,17 @@ Required properties:
|
|||
- interrupts: the interrupt outputs of the controller
|
||||
- #gpio-cells: number of cells to describe a GPIO
|
||||
- gpio-controller: mark the device as a GPIO controller
|
||||
- regulators: list of regulators provided by this controller, must be named
|
||||
after their hardware counterparts: sm[0-2], ldo[0-9] and ldo_rtc
|
||||
- regulators: list of regulators provided by this controller, must have
|
||||
property "regulator-compatible" to match their hardware counterparts:
|
||||
sm[0-2], ldo[0-9] and ldo_rtc
|
||||
- sm0-supply: The input supply for the SM0.
|
||||
- sm1-supply: The input supply for the SM1.
|
||||
- sm2-supply: The input supply for the SM2.
|
||||
- vinldo01-supply: The input supply for the LDO1 and LDO2
|
||||
- vinldo23-supply: The input supply for the LDO2 and LDO3
|
||||
- vinldo4-supply: The input supply for the LDO4
|
||||
- vinldo678-supply: The input supply for the LDO6, LDO7 and LDO8
|
||||
- vinldo9-supply: The input supply for the LDO9
|
||||
|
||||
Each regulator is defined using the standard binding for regulators.
|
||||
|
||||
|
|
@ -21,75 +30,113 @@ Example:
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
|
||||
sm0-supply = <&some_reg>;
|
||||
sm1-supply = <&some_reg>;
|
||||
sm2-supply = <&some_reg>;
|
||||
vinldo01-supply = <...>;
|
||||
vinldo23-supply = <...>;
|
||||
vinldo4-supply = <...>;
|
||||
vinldo678-supply = <...>;
|
||||
vinldo9-supply = <...>;
|
||||
|
||||
regulators {
|
||||
sm0_reg: sm0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sm0_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sm0";
|
||||
regulator-min-microvolt = < 725000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm1_reg: sm1 {
|
||||
sm1_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm1";
|
||||
regulator-min-microvolt = < 725000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: sm2 {
|
||||
sm2_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm2";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <4550000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo0_reg: ldo0 {
|
||||
ldo0_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "ldo0";
|
||||
regulator-name = "PCIE CLK";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
ldo1_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo1";
|
||||
regulator-min-microvolt = < 725000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
ldo2_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo2";
|
||||
regulator-min-microvolt = < 725000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
ldo3_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo3";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
ldo4_reg: regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo4";
|
||||
regulator-min-microvolt = <1700000>;
|
||||
regulator-max-microvolt = <2475000>;
|
||||
};
|
||||
|
||||
ldo5_reg: ldo5 {
|
||||
ldo5_reg: regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo5";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo6_reg: ldo6 {
|
||||
ldo6_reg: regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo6";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo7_reg: ldo7 {
|
||||
ldo7_reg: regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo7";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo8_reg: ldo8 {
|
||||
ldo8_reg: regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo8";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
ldo9_reg: regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo9";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@ For twl6030 regulators/LDOs
|
|||
- "ti,twl6030-vusb" for VUSB LDO
|
||||
- "ti,twl6030-v1v8" for V1V8 LDO
|
||||
- "ti,twl6030-v2v1" for V2V1 LDO
|
||||
- "ti,twl6030-clk32kg" for CLK32KG RESOURCE
|
||||
- "ti,twl6030-vdd1" for VDD1 SMPS
|
||||
- "ti,twl6030-vdd2" for VDD2 SMPS
|
||||
- "ti,twl6030-vdd3" for VDD3 SMPS
|
||||
|
|
|
|||
|
|
@ -0,0 +1,25 @@
|
|||
* Designware APB timer
|
||||
|
||||
Required properties:
|
||||
- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: IRQ line for the timer.
|
||||
- clock-frequency: The frequency in HZ of the timer.
|
||||
- clock-freq: For backwards compatibility with picoxcell
|
||||
|
||||
Example:
|
||||
|
||||
timer1: timer@ffc09000 {
|
||||
compatible = "snps,dw-apb-timer-sp";
|
||||
interrupts = <0 168 4>;
|
||||
clock-frequency = <200000000>;
|
||||
reg = <0xffc09000 0x1000>;
|
||||
};
|
||||
|
||||
timer2: timer@ffd00000 {
|
||||
compatible = "snps,dw-apb-timer-osc";
|
||||
interrupts = <0 169 4>;
|
||||
clock-frequency = <200000000>;
|
||||
reg = <0xffd00000 0x1000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
* STMP3xxx/i.MX28 Time Clock controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following.
|
||||
* "fsl,stmp3xxx-rtc"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: rtc alarm interrupt
|
||||
|
||||
Example:
|
||||
|
||||
rtc@80056000 {
|
||||
compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
|
||||
reg = <0x80056000 2000>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
|
@ -17,6 +17,6 @@ ecspi@70010000 {
|
|||
reg = <0x70010000 0x4000>;
|
||||
interrupts = <36>;
|
||||
fsl,spi-num-chipselects = <2>;
|
||||
cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
|
||||
<&gpio3 25 0>; /* GPIO4_25 */
|
||||
cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
|
||||
<&gpio3 25 0>; /* GPIO3_25 */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,116 @@
|
|||
* Samsung SPI Controller
|
||||
|
||||
The Samsung SPI controller is used to interface with various devices such as flash
|
||||
and display controllers using the SPI communication interface.
|
||||
|
||||
Required SoC Specific Properties:
|
||||
|
||||
- compatible: should be one of the following.
|
||||
- samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
|
||||
- samsung,s3c6410-spi: for s3c6410 platforms
|
||||
- samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
|
||||
- samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
|
||||
- samsung,exynos4210-spi: for exynos4 and exynos5 platforms
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- interrupts: The interrupt number to the cpu. The interrupt specifier format
|
||||
depends on the interrupt controller.
|
||||
|
||||
[PRELIMINARY: the dma channel allocation will change once there are
|
||||
official DMA bindings]
|
||||
|
||||
- tx-dma-channel: The dma channel specifier for tx operations. The format of
|
||||
the dma specifier depends on the dma controller.
|
||||
|
||||
- rx-dma-channel: The dma channel specifier for rx operations. The format of
|
||||
the dma specifier depends on the dma controller.
|
||||
|
||||
Required Board Specific Properties:
|
||||
|
||||
- #address-cells: should be 1.
|
||||
- #size-cells: should be 0.
|
||||
- gpios: The gpio specifier for clock, mosi and miso interface lines (in the
|
||||
order specified). The format of the gpio specifier depends on the gpio
|
||||
controller.
|
||||
|
||||
Optional Board Specific Properties:
|
||||
|
||||
- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
|
||||
select the clock source for the spi bus clock, this property can be used to
|
||||
indicate the clock to be used for driving the spi bus clock. If not specified,
|
||||
the clock number 0 is used as default.
|
||||
|
||||
- num-cs: Specifies the number of chip select lines supported. If
|
||||
not specified, the default number of chip select lines is set to 1.
|
||||
|
||||
SPI Controller specific data in SPI slave nodes:
|
||||
|
||||
- The spi slave nodes should provide the following information which is required
|
||||
by the spi controller.
|
||||
|
||||
- cs-gpio: A gpio specifier that specifies the gpio line used as
|
||||
the slave select line by the spi controller. The format of the gpio
|
||||
specifier depends on the gpio controller.
|
||||
|
||||
- samsung,spi-feedback-delay: The sampling phase shift to be applied on the
|
||||
miso line (to account for any lag in the miso line). The following are the
|
||||
valid values.
|
||||
|
||||
- 0: No phase shift.
|
||||
- 1: 90 degree phase shift sampling.
|
||||
- 2: 180 degree phase shift sampling.
|
||||
- 3: 270 degree phase shift sampling.
|
||||
|
||||
Aliases:
|
||||
|
||||
- All the SPI controller nodes should be represented in the aliases node using
|
||||
the following format 'spi{n}' where n is a unique number for the alias.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
- SoC Specific Portion:
|
||||
|
||||
spi_0: spi@12d20000 {
|
||||
compatible = "samsung,exynos4210-spi";
|
||||
reg = <0x12d20000 0x100>;
|
||||
interrupts = <0 66 0>;
|
||||
tx-dma-channel = <&pdma0 5>;
|
||||
rx-dma-channel = <&pdma0 4>;
|
||||
};
|
||||
|
||||
- Board Specific Portion:
|
||||
|
||||
spi_0: spi@12d20000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpios = <&gpa2 4 2 3 0>,
|
||||
<&gpa2 6 2 3 0>,
|
||||
<&gpa2 7 2 3 0>;
|
||||
|
||||
w25q80bw@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25x80";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000>;
|
||||
|
||||
controller-data {
|
||||
cs-gpio = <&gpa2 5 1 0 3>;
|
||||
samsung,spi-feedback-delay = <0>;
|
||||
};
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "Kernel";
|
||||
reg = <0x40000 0xc0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
* Freescale MXS Application UART (AUART)
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "fsl,<soc>-auart". The supported SoCs include
|
||||
imx23 and imx28.
|
||||
- reg : Address and length of the register set for the device
|
||||
- interrupts : Should contain the auart interrupt numbers
|
||||
|
||||
Example:
|
||||
auart0: serial@8006a000 {
|
||||
compatible = "fsl,imx28-auart", "fsl,imx23-auart";
|
||||
reg = <0x8006a000 0x2000>;
|
||||
interrupts = <112 70 71>;
|
||||
};
|
||||
|
||||
Note: Each auart port should have an alias correctly numbered in "aliases"
|
||||
node.
|
||||
|
||||
Example:
|
||||
|
||||
aliases {
|
||||
serial0 = &auart0;
|
||||
serial1 = &auart1;
|
||||
serial2 = &auart2;
|
||||
serial3 = &auart3;
|
||||
serial4 = &auart4;
|
||||
};
|
||||
|
|
@ -3,6 +3,7 @@ Device tree binding vendor prefix registry. Keep list in alphabetical order.
|
|||
This isn't an exhaustive list, but you should add new prefixes to it before
|
||||
using them to avoid name-space collisions.
|
||||
|
||||
ad Avionic Design GmbH
|
||||
adi Analog Devices, Inc.
|
||||
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
|
||||
apm Applied Micro Circuits Corporation (APM)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,14 @@
|
|||
TI Watchdog Timer (WDT) Controller for OMAP
|
||||
|
||||
Required properties:
|
||||
compatible:
|
||||
- "ti,omap3-wdt" for OMAP3
|
||||
- "ti,omap4-wdt" for OMAP4
|
||||
- ti,hwmods: Name of the hwmod associated to the WDT
|
||||
|
||||
Examples:
|
||||
|
||||
wdt2: wdt@4a314000 {
|
||||
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
|
|
@ -312,7 +312,7 @@ device tree for the NVIDIA Tegra board.
|
|||
};
|
||||
};
|
||||
|
||||
At .machine_init() time, Tegra board support code will need to look at
|
||||
At .init_machine() time, Tegra board support code will need to look at
|
||||
this DT and decide which nodes to create platform_devices for.
|
||||
However, looking at the tree, it is not immediately obvious what kind
|
||||
of device each node represents, or even if a node represents a device
|
||||
|
|
|
|||
|
|
@ -249,15 +249,6 @@ Who: Ravikiran Thirumalai <kiran@scalex86.org>
|
|||
|
||||
---------------------------
|
||||
|
||||
What: Code that is now under CONFIG_WIRELESS_EXT_SYSFS
|
||||
(in net/core/net-sysfs.c)
|
||||
When: 3.5
|
||||
Why: Over 1K .text/.data size reduction, data is available in other
|
||||
ways (ioctls)
|
||||
Who: Johannes Berg <johannes@sipsolutions.net>
|
||||
|
||||
---------------------------
|
||||
|
||||
What: sysfs ui for changing p4-clockmod parameters
|
||||
When: September 2009
|
||||
Why: See commits 129f8ae9b1b5be94517da76009ea956e89104ce8 and
|
||||
|
|
@ -414,21 +405,6 @@ Who: Jean Delvare <khali@linux-fr.org>
|
|||
|
||||
----------------------------
|
||||
|
||||
What: xt_connlimit rev 0
|
||||
When: 2012
|
||||
Who: Jan Engelhardt <jengelh@medozas.de>
|
||||
Files: net/netfilter/xt_connlimit.c
|
||||
|
||||
----------------------------
|
||||
|
||||
What: ipt_addrtype match include file
|
||||
When: 2012
|
||||
Why: superseded by xt_addrtype
|
||||
Who: Florian Westphal <fw@strlen.de>
|
||||
Files: include/linux/netfilter_ipv4/ipt_addrtype.h
|
||||
|
||||
----------------------------
|
||||
|
||||
What: i2c_driver.attach_adapter
|
||||
i2c_driver.detach_adapter
|
||||
When: September 2011
|
||||
|
|
@ -449,6 +425,19 @@ Who: Hans Verkuil <hans.verkuil@cisco.com>
|
|||
|
||||
----------------------------
|
||||
|
||||
What: CONFIG_CFG80211_WEXT
|
||||
When: as soon as distributions ship new wireless tools, ie. wpa_supplicant 1.0
|
||||
and NetworkManager/connman/etc. that are able to use nl80211
|
||||
Why: Wireless extensions are deprecated, and userland tools are moving to
|
||||
using nl80211. New drivers are no longer using wireless extensions,
|
||||
and while there might still be old drivers, both new drivers and new
|
||||
userland no longer needs them and they can't be used for an feature
|
||||
developed in the past couple of years. As such, compatibility with
|
||||
wireless extensions in new drivers will be removed.
|
||||
Who: Johannes Berg <johannes@sipsolutions.net>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: g_file_storage driver
|
||||
When: 3.8
|
||||
Why: This driver has been superseded by g_mass_storage.
|
||||
|
|
@ -589,6 +578,13 @@ Why: Remount currently allows changing bound subsystems and
|
|||
|
||||
----------------------------
|
||||
|
||||
What: xt_recent rev 0
|
||||
When: 2013
|
||||
Who: Pablo Neira Ayuso <pablo@netfilter.org>
|
||||
Files: net/netfilter/xt_recent.c
|
||||
|
||||
----------------------------
|
||||
|
||||
What: KVM debugfs statistics
|
||||
When: 2013
|
||||
Why: KVM tracepoints provide mostly equivalent information in a much more
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ be able to use diff(1).
|
|||
|
||||
--------------------------- dentry_operations --------------------------
|
||||
prototypes:
|
||||
int (*d_revalidate)(struct dentry *, struct nameidata *);
|
||||
int (*d_revalidate)(struct dentry *, unsigned int);
|
||||
int (*d_hash)(const struct dentry *, const struct inode *,
|
||||
struct qstr *);
|
||||
int (*d_compare)(const struct dentry *, const struct inode *,
|
||||
|
|
@ -37,9 +37,8 @@ d_manage: no no yes (ref-walk) maybe
|
|||
|
||||
--------------------------- inode_operations ---------------------------
|
||||
prototypes:
|
||||
int (*create) (struct inode *,struct dentry *,umode_t, struct nameidata *);
|
||||
struct dentry * (*lookup) (struct inode *,struct dentry *, struct nameid
|
||||
ata *);
|
||||
int (*create) (struct inode *,struct dentry *,umode_t, bool);
|
||||
struct dentry * (*lookup) (struct inode *,struct dentry *, unsigned int);
|
||||
int (*link) (struct dentry *,struct inode *,struct dentry *);
|
||||
int (*unlink) (struct inode *,struct dentry *);
|
||||
int (*symlink) (struct inode *,struct dentry *,const char *);
|
||||
|
|
@ -62,6 +61,9 @@ ata *);
|
|||
int (*removexattr) (struct dentry *, const char *);
|
||||
int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len);
|
||||
void (*update_time)(struct inode *, struct timespec *, int);
|
||||
int (*atomic_open)(struct inode *, struct dentry *,
|
||||
struct file *, unsigned open_flag,
|
||||
umode_t create_mode, int *opened);
|
||||
|
||||
locking rules:
|
||||
all may block
|
||||
|
|
@ -89,6 +91,7 @@ listxattr: no
|
|||
removexattr: yes
|
||||
fiemap: no
|
||||
update_time: no
|
||||
atomic_open: yes
|
||||
|
||||
Additionally, ->rmdir(), ->unlink() and ->rename() have ->i_mutex on
|
||||
victim.
|
||||
|
|
|
|||
|
|
@ -355,12 +355,10 @@ protects *all* the dcache state of a given dentry.
|
|||
via rcu-walk path walk (basically, if the file can have had a path name in the
|
||||
vfs namespace).
|
||||
|
||||
i_dentry and i_rcu share storage in a union, and the vfs expects
|
||||
i_dentry to be reinitialized before it is freed, so an:
|
||||
|
||||
INIT_LIST_HEAD(&inode->i_dentry);
|
||||
|
||||
must be done in the RCU callback.
|
||||
Even though i_dentry and i_rcu share storage in a union, we will
|
||||
initialize the former in inode_init_always(), so just leave it alone in
|
||||
the callback. It used to be necessary to clean it there, but not anymore
|
||||
(starting at 3.2).
|
||||
|
||||
--
|
||||
[recommended]
|
||||
|
|
@ -433,3 +431,14 @@ release it yourself.
|
|||
d_alloc_root() is gone, along with a lot of bugs caused by code
|
||||
misusing it. Replacement: d_make_root(inode). The difference is,
|
||||
d_make_root() drops the reference to inode if dentry allocation fails.
|
||||
|
||||
--
|
||||
[mandatory]
|
||||
The witch is dead! Well, 2/3 of it, anyway. ->d_revalidate() and
|
||||
->lookup() do *not* take struct nameidata anymore; just the flags.
|
||||
--
|
||||
[mandatory]
|
||||
->create() doesn't take struct nameidata *; unlike the previous
|
||||
two, it gets "is it an O_EXCL or equivalent?" boolean argument. Note that
|
||||
local filesystems can ignore tha argument - they are guaranteed that the
|
||||
object doesn't exist. It's remote/distributed ones that might care...
|
||||
|
|
|
|||
|
|
@ -341,8 +341,8 @@ This describes how the VFS can manipulate an inode in your
|
|||
filesystem. As of kernel 2.6.22, the following members are defined:
|
||||
|
||||
struct inode_operations {
|
||||
int (*create) (struct inode *,struct dentry *, umode_t, struct nameidata *);
|
||||
struct dentry * (*lookup) (struct inode *,struct dentry *, struct nameidata *);
|
||||
int (*create) (struct inode *,struct dentry *, umode_t, bool);
|
||||
struct dentry * (*lookup) (struct inode *,struct dentry *, unsigned int);
|
||||
int (*link) (struct dentry *,struct inode *,struct dentry *);
|
||||
int (*unlink) (struct inode *,struct dentry *);
|
||||
int (*symlink) (struct inode *,struct dentry *,const char *);
|
||||
|
|
@ -364,6 +364,9 @@ struct inode_operations {
|
|||
ssize_t (*listxattr) (struct dentry *, char *, size_t);
|
||||
int (*removexattr) (struct dentry *, const char *);
|
||||
void (*update_time)(struct inode *, struct timespec *, int);
|
||||
int (*atomic_open)(struct inode *, struct dentry *,
|
||||
struct file *, unsigned open_flag,
|
||||
umode_t create_mode, int *opened);
|
||||
};
|
||||
|
||||
Again, all methods are called without any locks being held, unless
|
||||
|
|
@ -476,6 +479,14 @@ otherwise noted.
|
|||
an inode. If this is not defined the VFS will update the inode itself
|
||||
and call mark_inode_dirty_sync.
|
||||
|
||||
atomic_open: called on the last component of an open. Using this optional
|
||||
method the filesystem can look up, possibly create and open the file in
|
||||
one atomic operation. If it cannot perform this (e.g. the file type
|
||||
turned out to be wrong) it may signal this by returning 1 instead of
|
||||
usual 0 or -ve . This method is only called if the last
|
||||
component is negative or needs lookup. Cached positive dentries are
|
||||
still handled by f_op->open().
|
||||
|
||||
The Address Space Object
|
||||
========================
|
||||
|
||||
|
|
@ -891,7 +902,7 @@ the VFS uses a default. As of kernel 2.6.22, the following members are
|
|||
defined:
|
||||
|
||||
struct dentry_operations {
|
||||
int (*d_revalidate)(struct dentry *, struct nameidata *);
|
||||
int (*d_revalidate)(struct dentry *, unsigned int);
|
||||
int (*d_hash)(const struct dentry *, const struct inode *,
|
||||
struct qstr *);
|
||||
int (*d_compare)(const struct dentry *, const struct inode *,
|
||||
|
|
@ -910,11 +921,11 @@ struct dentry_operations {
|
|||
dcache. Most filesystems leave this as NULL, because all their
|
||||
dentries in the dcache are valid
|
||||
|
||||
d_revalidate may be called in rcu-walk mode (nd->flags & LOOKUP_RCU).
|
||||
d_revalidate may be called in rcu-walk mode (flags & LOOKUP_RCU).
|
||||
If in rcu-walk mode, the filesystem must revalidate the dentry without
|
||||
blocking or storing to the dentry, d_parent and d_inode should not be
|
||||
used without care (because they can go NULL), instead nd->inode should
|
||||
be used.
|
||||
used without care (because they can change and, in d_inode case, even
|
||||
become NULL under us).
|
||||
|
||||
If a situation is encountered that rcu-walk cannot handle, return
|
||||
-ECHILD and it will be called again in ref-walk mode.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,169 @@
|
|||
UHID - User-space I/O driver support for HID subsystem
|
||||
========================================================
|
||||
|
||||
The HID subsystem needs two kinds of drivers. In this document we call them:
|
||||
|
||||
1. The "HID I/O Driver" is the driver that performs raw data I/O to the
|
||||
low-level device. Internally, they register an hid_ll_driver structure with
|
||||
the HID core. They perform device setup, read raw data from the device and
|
||||
push it into the HID subsystem and they provide a callback so the HID
|
||||
subsystem can send data to the device.
|
||||
|
||||
2. The "HID Device Driver" is the driver that parses HID reports and reacts on
|
||||
them. There are generic drivers like "generic-usb" and "generic-bluetooth"
|
||||
which adhere to the HID specification and provide the standardizes features.
|
||||
But there may be special drivers and quirks for each non-standard device out
|
||||
there. Internally, they use the hid_driver structure.
|
||||
|
||||
Historically, the USB stack was the first subsystem to provide an HID I/O
|
||||
Driver. However, other standards like Bluetooth have adopted the HID specs and
|
||||
may provide HID I/O Drivers, too. The UHID driver allows to implement HID I/O
|
||||
Drivers in user-space and feed the data into the kernel HID-subsystem.
|
||||
|
||||
This allows user-space to operate on the same level as USB-HID, Bluetooth-HID
|
||||
and similar. It does not provide a way to write HID Device Drivers, though. Use
|
||||
hidraw for this purpose.
|
||||
|
||||
There is an example user-space application in ./samples/uhid/uhid-example.c
|
||||
|
||||
The UHID API
|
||||
------------
|
||||
|
||||
UHID is accessed through a character misc-device. The minor-number is allocated
|
||||
dynamically so you need to rely on udev (or similar) to create the device node.
|
||||
This is /dev/uhid by default.
|
||||
|
||||
If a new device is detected by your HID I/O Driver and you want to register this
|
||||
device with the HID subsystem, then you need to open /dev/uhid once for each
|
||||
device you want to register. All further communication is done by read()'ing or
|
||||
write()'ing "struct uhid_event" objects. Non-blocking operations are supported
|
||||
by setting O_NONBLOCK.
|
||||
|
||||
struct uhid_event {
|
||||
__u32 type;
|
||||
union {
|
||||
struct uhid_create_req create;
|
||||
struct uhid_data_req data;
|
||||
...
|
||||
} u;
|
||||
};
|
||||
|
||||
The "type" field contains the ID of the event. Depending on the ID different
|
||||
payloads are sent. You must not split a single event across multiple read()'s or
|
||||
multiple write()'s. A single event must always be sent as a whole. Furthermore,
|
||||
only a single event can be sent per read() or write(). Pending data is ignored.
|
||||
If you want to handle multiple events in a single syscall, then use vectored
|
||||
I/O with readv()/writev().
|
||||
|
||||
The first thing you should do is sending an UHID_CREATE event. This will
|
||||
register the device. UHID will respond with an UHID_START event. You can now
|
||||
start sending data to and reading data from UHID. However, unless UHID sends the
|
||||
UHID_OPEN event, the internally attached HID Device Driver has no user attached.
|
||||
That is, you might put your device asleep unless you receive the UHID_OPEN
|
||||
event. If you receive the UHID_OPEN event, you should start I/O. If the last
|
||||
user closes the HID device, you will receive an UHID_CLOSE event. This may be
|
||||
followed by an UHID_OPEN event again and so on. There is no need to perform
|
||||
reference-counting in user-space. That is, you will never receive multiple
|
||||
UHID_OPEN events without an UHID_CLOSE event. The HID subsystem performs
|
||||
ref-counting for you.
|
||||
You may decide to ignore UHID_OPEN/UHID_CLOSE, though. I/O is allowed even
|
||||
though the device may have no users.
|
||||
|
||||
If you want to send data to the HID subsystem, you send an HID_INPUT event with
|
||||
your raw data payload. If the kernel wants to send data to the device, you will
|
||||
read an UHID_OUTPUT or UHID_OUTPUT_EV event.
|
||||
|
||||
If your device disconnects, you should send an UHID_DESTROY event. This will
|
||||
unregister the device. You can now send UHID_CREATE again to register a new
|
||||
device.
|
||||
If you close() the fd, the device is automatically unregistered and destroyed
|
||||
internally.
|
||||
|
||||
write()
|
||||
-------
|
||||
write() allows you to modify the state of the device and feed input data into
|
||||
the kernel. The following types are supported: UHID_CREATE, UHID_DESTROY and
|
||||
UHID_INPUT. The kernel will parse the event immediately and if the event ID is
|
||||
not supported, it will return -EOPNOTSUPP. If the payload is invalid, then
|
||||
-EINVAL is returned, otherwise, the amount of data that was read is returned and
|
||||
the request was handled successfully.
|
||||
|
||||
UHID_CREATE:
|
||||
This creates the internal HID device. No I/O is possible until you send this
|
||||
event to the kernel. The payload is of type struct uhid_create_req and
|
||||
contains information about your device. You can start I/O now.
|
||||
|
||||
UHID_DESTROY:
|
||||
This destroys the internal HID device. No further I/O will be accepted. There
|
||||
may still be pending messages that you can receive with read() but no further
|
||||
UHID_INPUT events can be sent to the kernel.
|
||||
You can create a new device by sending UHID_CREATE again. There is no need to
|
||||
reopen the character device.
|
||||
|
||||
UHID_INPUT:
|
||||
You must send UHID_CREATE before sending input to the kernel! This event
|
||||
contains a data-payload. This is the raw data that you read from your device.
|
||||
The kernel will parse the HID reports and react on it.
|
||||
|
||||
UHID_FEATURE_ANSWER:
|
||||
If you receive a UHID_FEATURE request you must answer with this request. You
|
||||
must copy the "id" field from the request into the answer. Set the "err" field
|
||||
to 0 if no error occured or to EIO if an I/O error occurred.
|
||||
If "err" is 0 then you should fill the buffer of the answer with the results
|
||||
of the feature request and set "size" correspondingly.
|
||||
|
||||
read()
|
||||
------
|
||||
read() will return a queued ouput report. These output reports can be of type
|
||||
UHID_START, UHID_STOP, UHID_OPEN, UHID_CLOSE, UHID_OUTPUT or UHID_OUTPUT_EV. No
|
||||
reaction is required to any of them but you should handle them according to your
|
||||
needs. Only UHID_OUTPUT and UHID_OUTPUT_EV have payloads.
|
||||
|
||||
UHID_START:
|
||||
This is sent when the HID device is started. Consider this as an answer to
|
||||
UHID_CREATE. This is always the first event that is sent.
|
||||
|
||||
UHID_STOP:
|
||||
This is sent when the HID device is stopped. Consider this as an answer to
|
||||
UHID_DESTROY.
|
||||
If the kernel HID device driver closes the device manually (that is, you
|
||||
didn't send UHID_DESTROY) then you should consider this device closed and send
|
||||
an UHID_DESTROY event. You may want to reregister your device, though. This is
|
||||
always the last message that is sent to you unless you reopen the device with
|
||||
UHID_CREATE.
|
||||
|
||||
UHID_OPEN:
|
||||
This is sent when the HID device is opened. That is, the data that the HID
|
||||
device provides is read by some other process. You may ignore this event but
|
||||
it is useful for power-management. As long as you haven't received this event
|
||||
there is actually no other process that reads your data so there is no need to
|
||||
send UHID_INPUT events to the kernel.
|
||||
|
||||
UHID_CLOSE:
|
||||
This is sent when there are no more processes which read the HID data. It is
|
||||
the counterpart of UHID_OPEN and you may as well ignore this event.
|
||||
|
||||
UHID_OUTPUT:
|
||||
This is sent if the HID device driver wants to send raw data to the I/O
|
||||
device. You should read the payload and forward it to the device. The payload
|
||||
is of type "struct uhid_data_req".
|
||||
This may be received even though you haven't received UHID_OPEN, yet.
|
||||
|
||||
UHID_OUTPUT_EV:
|
||||
Same as UHID_OUTPUT but this contains a "struct input_event" as payload. This
|
||||
is called for force-feedback, LED or similar events which are received through
|
||||
an input device by the HID subsystem. You should convert this into raw reports
|
||||
and send them to your device similar to events of type UHID_OUTPUT.
|
||||
|
||||
UHID_FEATURE:
|
||||
This event is sent if the kernel driver wants to perform a feature request as
|
||||
described in the HID specs. The report-type and report-number are available in
|
||||
the payload.
|
||||
The kernel serializes feature requests so there will never be two in parallel.
|
||||
However, if you fail to respond with a UHID_FEATURE_ANSWER in a time-span of 5
|
||||
seconds, then the requests will be dropped and a new one might be sent.
|
||||
Therefore, the payload also contains an "id" field that identifies every
|
||||
request.
|
||||
|
||||
Document by:
|
||||
David Herrmann <dh.herrmann@googlemail.com>
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
Supported chips:
|
||||
* Dialog Semiconductors DA9052-BC and DA9053-AA/Bx PMICs
|
||||
Prefix: 'da9052'
|
||||
Datasheet: Datasheet is not publicly available.
|
||||
|
||||
Authors: David Dajun Chen <dchen@diasemi.com>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
The DA9052/53 provides an Analogue to Digital Converter (ADC) with 10 bits
|
||||
resolution and track and hold circuitry combined with an analogue input
|
||||
multiplexer. The analogue input multiplexer will allow conversion of up to 10
|
||||
different inputs. The track and hold circuit ensures stable input voltages at
|
||||
the input of the ADC during the conversion.
|
||||
|
||||
The ADC is used to measure the following inputs:
|
||||
Channel 0: VDDOUT - measurement of the system voltage
|
||||
Channel 1: ICH - internal battery charger current measurement
|
||||
Channel 2: TBAT - output from the battery NTC
|
||||
Channel 3: VBAT - measurement of the battery voltage
|
||||
Channel 4: ADC_IN4 - high impedance input (0 - 2.5V)
|
||||
Channel 5: ADC_IN5 - high impedance input (0 - 2.5V)
|
||||
Channel 6: ADC_IN6 - high impedance input (0 - 2.5V)
|
||||
Channel 7: XY - TSI interface to measure the X and Y voltage of the touch
|
||||
screen resistive potentiometers
|
||||
Channel 8: Internal Tjunc. - sense (internal temp. sensor)
|
||||
Channel 9: VBBAT - measurement of the backup battery voltage
|
||||
|
||||
By using sysfs attributes we can measure the system voltage VDDOUT, the battery
|
||||
charging current ICH, battery temperature TBAT, battery junction temperature
|
||||
TJUNC, battery voltage VBAT and the back up battery voltage VBBAT.
|
||||
|
||||
Voltage Monitoring
|
||||
------------------
|
||||
|
||||
Voltages are sampled by a 10 bit ADC.
|
||||
|
||||
The battery voltage is calculated as:
|
||||
Milli volt = ((ADC value * 1000) / 512) + 2500
|
||||
|
||||
The backup battery voltage is calculated as:
|
||||
Milli volt = (ADC value * 2500) / 512;
|
||||
|
||||
The voltages on ADC channels 4, 5 and 6 are calculated as:
|
||||
Milli volt = (ADC value * 2500) / 1023
|
||||
|
||||
Temperature Monitoring
|
||||
----------------------
|
||||
|
||||
Temperatures are sampled by a 10 bit ADC. Junction and battery temperatures
|
||||
are monitored by the ADC channels.
|
||||
|
||||
The junction temperature is calculated:
|
||||
Degrees celsius = 1.708 * (TJUNC_RES - T_OFFSET) - 108.8
|
||||
The junction temperature attribute is supported by the driver.
|
||||
|
||||
The battery temperature is calculated:
|
||||
Degree Celcius = 1 / (t1 + 1/298)- 273
|
||||
where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))
|
||||
Default values of R25, B, ITBAT are 10e3, 3380 and 50e-6 respectively.
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
Kernel driver hih6130
|
||||
=====================
|
||||
|
||||
Supported chips:
|
||||
* Honeywell HIH-6130 / HIH-6131
|
||||
Prefix: 'hih6130'
|
||||
Addresses scanned: none
|
||||
Datasheet: Publicly available at the Honeywell website
|
||||
http://sensing.honeywell.com/index.php?ci_id=3106&la_id=1&defId=44872
|
||||
|
||||
Author:
|
||||
Iain Paton <ipaton0@gmail.com>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
The HIH-6130 & HIH-6131 are humidity and temperature sensors in a SO8 package.
|
||||
The difference between the two devices is that the HIH-6131 has a condensation
|
||||
filter.
|
||||
|
||||
The devices communicate with the I2C protocol. All sensors are set to the same
|
||||
I2C address 0x27 by default, so an entry with I2C_BOARD_INFO("hih6130", 0x27)
|
||||
can be used in the board setup code.
|
||||
|
||||
Please see Documentation/i2c/instantiating-devices for details on how to
|
||||
instantiate I2C devices.
|
||||
|
||||
sysfs-Interface
|
||||
---------------
|
||||
|
||||
temp1_input - temperature input
|
||||
humidity1_input - humidity input
|
||||
|
||||
Notes
|
||||
-----
|
||||
|
||||
Command mode and alarms are not currently supported.
|
||||
|
|
@ -70,6 +70,9 @@ increase the chances of your change being accepted.
|
|||
review more difficult. It may also result in code which is more complicated
|
||||
than necessary. Use inline functions or just regular functions instead.
|
||||
|
||||
* Use devres functions whenever possible to allocate resources. For rationale
|
||||
and supported functions, please see Documentation/driver-model/devres.txt.
|
||||
|
||||
* If the driver has a detect function, make sure it is silent. Debug messages
|
||||
and messages printed after a successful detection are acceptable, but it
|
||||
must not print messages such as "Chip XXX not found/supported".
|
||||
|
|
|
|||
|
|
@ -38,9 +38,10 @@ Module Parameters
|
|||
Disable selected features normally supported by the device. This makes it
|
||||
possible to work around possible driver or hardware bugs if the feature in
|
||||
question doesn't work as intended for whatever reason. Bit values:
|
||||
1 disable SMBus PEC
|
||||
2 disable the block buffer
|
||||
8 disable the I2C block read functionality
|
||||
0x01 disable SMBus PEC
|
||||
0x02 disable the block buffer
|
||||
0x08 disable the I2C block read functionality
|
||||
0x10 don't use interrupts
|
||||
|
||||
|
||||
Description
|
||||
|
|
@ -86,6 +87,12 @@ SMBus 2.0 Support
|
|||
The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
|
||||
|
||||
|
||||
Interrupt Support
|
||||
-----------------
|
||||
|
||||
PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
|
||||
|
||||
|
||||
Hidden ICH SMBus
|
||||
----------------
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue