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Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6265/1: kirkwood: move qnap_tsx1x_register_flash() to .init.text
  ARM: 6263/1: ns9xxx: fix FTBFS for zImage
  ARM: 6262/1: arm/clps711x: fix debug macro compilation failure
  ARM: 6261/1: arm/shark: fix debug macro compilation failure
  ARM: 6260/1: arm/plat-spear: fix debug macro compilation failure
  ARM: 6259/1: arm/ns9xxx: fix debug macro compilation failure
  ARM: 6258/1: arm/h720x: fix debug macro compilation failure
  ARM: 6233/1: Delete a wrong redundant right parenthesis
  ARM: 6230/1: fix nuc900 touchscreen clk definition bug
  [ARM] pxa: fix incorrect CONFIG_CPU_PXA27x to CONFIG_PXA27x
  [ARM] pxa/colibri-pxa300: fix AC97 init
  [ARM] pxa: fix incorrect order of AC97 reset pin configs
  [ARM] pxa: fix frequency scaling for pcmcia/pxa2xx_base
  [ARM] pxa: cpufreq-pxa2xx: fix DRI recomputation routine
  [ARM] pxa/corgi: fix MMC/SD card detection failure
This commit is contained in:
Linus Torvalds 2010-07-26 08:20:38 -07:00
parent 58b164b50a f9578fc078
commit 6aa033d7ef
17 changed files with 42 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-clps711x/include/mach/debug-macro.S
View File

@ -11,6 +11,7 @@
*
*/
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
.macro addruart, rx, tmp

2
arch/arm/mach-footbridge/common.c
View File

@ -232,7 +232,7 @@ EXPORT_SYMBOL(__bus_to_virt);
unsigned long __pfn_to_bus(unsigned long pfn)
{
return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET));
return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET);
}
EXPORT_SYMBOL(__pfn_to_bus);

6
arch/arm/mach-h720x/include/mach/debug-macro.S
View File

@ -11,8 +11,10 @@
*
*/
.equ io_virt, IO_BASE
.equ io_phys, IO_START
#include <mach/hardware.h>
.equ io_virt, IO_VIRT
.equ io_phys, IO_PHYS
.macro addruart, rx, tmp
mrc p15, 0, \rx, c1, c0

2
arch/arm/mach-kirkwood/tsx1x-common.c
View File

@ -77,7 +77,7 @@ struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
},
};
void qnap_tsx1x_register_flash(void)
void __init qnap_tsx1x_register_flash(void)
{
spi_register_board_info(qnap_tsx1x_spi_slave_info,
ARRAY_SIZE(qnap_tsx1x_spi_slave_info));

2
arch/arm/mach-kirkwood/tsx1x-common.h
View File

@ -1,7 +1,7 @@
#ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H
#define __ARCH_KIRKWOOD_TSX1X_COMMON_H
extern void qnap_tsx1x_register_flash(void);
extern void __init qnap_tsx1x_register_flash(void);
extern void qnap_tsx1x_power_off(void);
#endif

1
arch/arm/mach-ns9xxx/include/mach/debug-macro.S
View File

@ -8,6 +8,7 @@
* the Free Software Foundation.
*/
#include <mach/hardware.h>
#include <asm/memory.h>
#include <mach/regs-board-a9m9750dev.h>

30
arch/arm/mach-ns9xxx/include/mach/uncompress.h
View File

@ -20,50 +20,49 @@ static void putc_dummy(char c, void __iomem *base)
/* nothing */
}
static int timeout;
static void putc_ns9360(char c, void __iomem *base)
{
static int t = 0x10000;
do {
if (t)
--t;
if (timeout)
--timeout;
if (__raw_readl(base + 8) & (1 << 3)) {
__raw_writeb(c, base + 16);
t = 0x10000;
timeout = 0x10000;
break;
}
} while (t);
} while (timeout);
}
static void putc_a9m9750dev(char c, void __iomem *base)
{
static int t = 0x10000;
do {
if (t)
--t;
if (timeout)
--timeout;
if (__raw_readb(base + 5) & (1 << 5)) {
__raw_writeb(c, base);
t = 0x10000;
timeout = 0x10000;
break;
}
} while (t);
} while (timeout);
}
static void putc_ns921x(char c, void __iomem *base)
{
static int t = 0x10000;
do {
if (t)
--t;
if (timeout)
--timeout;
if (!(__raw_readl(base) & (1 << 11))) {
__raw_writeb(c, base + 0x0028);
t = 0x10000;
timeout = 0x10000;
break;
}
} while (t);
} while (timeout);
}
#define MSCS __REG(0xA0900184)
@ -89,6 +88,7 @@ static void putc_ns921x(char c, void __iomem *base)
static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
{
timeout = 0x10000;
if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
/* ns9360 or ns9750 */
if (NS9360_UART_ENABLED(NS9360_UARTA)) {

3
arch/arm/mach-pxa/colibri-pxa300.c
View File

@ -26,6 +26,7 @@
#include <mach/colibri.h>
#include <mach/ohci.h>
#include <mach/pxafb.h>
#include <mach/audio.h>
#include "generic.h"
#include "devices.h"
@ -145,7 +146,7 @@ static void __init colibri_pxa300_init_lcd(void)
static inline void colibri_pxa300_init_lcd(void) {}
#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
#if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE)
#if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE)
static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = {
GPIO24_AC97_SYSCLK,
GPIO23_AC97_nACRESET,

2
arch/arm/mach-pxa/corgi.c
View File

@ -446,7 +446,7 @@ static struct platform_device corgiled_device = {
static struct pxamci_platform_data corgi_mci_platform_data = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_detect = CORGI_GPIO_nSD_DETECT,
.gpio_card_ro = CORGI_GPIO_nSD_WP,
.gpio_power = CORGI_GPIO_SD_PWR,
};

8
arch/arm/mach-pxa/cpufreq-pxa2xx.c
View File

@ -256,13 +256,9 @@ static void init_sdram_rows(void)
static u32 mdrefr_dri(unsigned int freq)
{
u32 dri = 0;
u32 interval = freq * SDRAM_TREF / sdram_rows;
if (cpu_is_pxa25x())
dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
if (cpu_is_pxa27x())
dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
return dri;
return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32;
}
/* find a valid frequency point */

6
arch/arm/mach-pxa/pxa27x.c
View File

@ -41,10 +41,10 @@ void pxa27x_clear_otgph(void)
EXPORT_SYMBOL(pxa27x_clear_otgph);
static unsigned long ac97_reset_config[] = {
GPIO95_AC97_nRESET,
GPIO95_GPIO,
GPIO113_AC97_nRESET,
GPIO113_GPIO,
GPIO113_AC97_nRESET,
GPIO95_GPIO,
GPIO95_AC97_nRESET,
};
void pxa27x_assert_ac97reset(int reset_gpio, int on)

3
arch/arm/mach-shark/include/mach/debug-macro.S
View File

@ -20,6 +20,9 @@
strb \rd, [\rx]
.endm
.macro waituart,rd,rx
.endm
.macro busyuart,rd,rx
mov \rd, #0
1001: add \rd, \rd, #1

2
arch/arm/mach-w90x900/cpu.c
View File

@ -93,7 +93,7 @@ static struct clk_lookup nuc900_clkregs[] = {
DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL),
DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL),
DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL),
DEF_CLKLOOK(&clk_adc, "nuc900-adc", NULL),
DEF_CLKLOOK(&clk_adc, "nuc900-ts", NULL),
DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL),
DEF_CLKLOOK(&clk_ext, NULL, "ext"),
DEF_CLKLOOK(&clk_timer0, NULL, "timer0"),

4
arch/arm/plat-spear/include/plat/debug-macro.S
View File

@ -17,8 +17,8 @@
.macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base
movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base
moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base
movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base
.endm
.macro senduart, rd, rx

5
drivers/pcmcia/pxa2xx_base.c
View File

@ -178,7 +178,6 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
unsigned long val,
struct cpufreq_freqs *freqs)
{
#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
switch (val) {
case CPUFREQ_PRECHANGE:
if (freqs->new > freqs->old) {
@ -186,7 +185,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
"pre-updating\n",
freqs->new / 1000, (freqs->new / 100) % 10,
freqs->old / 1000, (freqs->old / 100) % 10);
pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
pxa2xx_pcmcia_set_timing(skt);
}
break;
@ -196,7 +195,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
"post-updating\n",
freqs->new / 1000, (freqs->new / 100) % 10,
freqs->old / 1000, (freqs->old / 100) % 10);
pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
pxa2xx_pcmcia_set_timing(skt);
}
break;
}

2
drivers/usb/gadget/pxa27x_udc.c
View File

@ -2561,7 +2561,7 @@ static void pxa_udc_shutdown(struct platform_device *_dev)
udc_disable(udc);
}
#ifdef CONFIG_CPU_PXA27x
#ifdef CONFIG_PXA27x
extern void pxa27x_clear_otgph(void);
#else
#define pxa27x_clear_otgph() do {} while (0)

2
drivers/usb/host/ohci-pxa27x.c
View File

@ -203,7 +203,7 @@ static inline void pxa27x_reset_hc(struct pxa27x_ohci *ohci)
__raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR);
}
#ifdef CONFIG_CPU_PXA27x
#ifdef CONFIG_PXA27x
extern void pxa27x_clear_otgph(void);
#else
#define pxa27x_clear_otgph() do {} while (0)