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[MIPS] TXx9: Reorganize code 

Move arch/mips/{jmr3927,tx4927,tx4938} into arch/mips/txx9/ tree.
This will help more code sharing and maintainance.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Atsushi Nemoto 2008-07-11 00:31:36 +09:00 committed by Ralf Baechle
parent 14476007c9
commit 22b1d707ff
49 changed files with 104 additions and 217 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/mips/Kconfig
View File

@ -642,8 +642,7 @@ source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
source "arch/mips/tx4927/Kconfig"
source "arch/mips/tx4938/Kconfig"
source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
endmenu

12
arch/mips/Makefile
View File

@ -553,8 +553,8 @@ all-$(CONFIG_SNI_RM) := vmlinux.ecoff
#
# Toshiba JMR-TX3927 board
#
core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
arch/mips/jmr3927/common/
core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/ \
arch/mips/txx9/generic/
cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
@ -562,16 +562,16 @@ load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
# Toshiba RBTX4927 board or
# Toshiba RBTX4937 board
#
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/generic/
cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
#
# Toshiba RBTX4938 board
#
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/generic/
cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000

7
arch/mips/jmr3927/common/Makefile
View File

@ -1,7 +0,0 @@
#
# Makefile for the common code of TOSHIBA JMR-TX3927 board
#
obj-y += prom.o puts.o
EXTRA_CFLAGS += -Werror

60
arch/mips/jmr3927/common/puts.c
View File

@ -1,60 +0,0 @@
/*
*
* BRIEF MODULE DESCRIPTION
* Low level uart routines to directly access a TX[34]927 SIO.
*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ahennessy@mvista.com or source@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
* Based on arch/mips/au1000/common/puts.c
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <asm/jmr3927/tx3927.h>
#define TIMEOUT 0xffffff
void
prom_putchar(char c)
{
int i = 0;
do {
i++;
if (i>TIMEOUT)
break;
} while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
tx3927_sioptr(1)->tfifo = c;
return;
}
void
puts(const char *cp)
{
while (*cp)
prom_putchar(*cp++);
prom_putchar('\r');
prom_putchar('\n');
}

2
arch/mips/pci/Makefile
View File

@ -43,7 +43,7 @@ obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o
obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o
obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o ops-tx4938.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o

2
arch/mips/pci/fixup-jmr3927.c
View File

@ -31,7 +31,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{

2
arch/mips/pci/fixup-rbtx4927.c
View File

@ -37,7 +37,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/tx4927/tx4927.h>
#include <asm/txx9/tx4927.h>
#undef DEBUG
#ifdef DEBUG

2
arch/mips/pci/fixup-tx4938.c → arch/mips/pci/fixup-rbtx4938.c
View File

@ -14,7 +14,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/tx4938/rbtx4938.h>
#include <asm/txx9/rbtx4938.h>
extern struct pci_controller tx4938_pci_controller[];

2
arch/mips/pci/ops-tx3927.c
View File

@ -39,7 +39,7 @@
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
unsigned char where)

2
arch/mips/pci/ops-tx4927.c
View File

@ -40,7 +40,7 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/tx4927/tx4927.h>
#include <asm/txx9/tx4927.h>
/* initialize in setup */
struct resource pci_io_resource = {

2
arch/mips/pci/ops-tx4938.c
View File

@ -15,7 +15,7 @@
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/tx4938/rbtx4938.h>
#include <asm/txx9/rbtx4938.h>
/* initialize in setup */
struct resource pci_io_resource = {

2
arch/mips/pci/pci-jmr3927.c
View File

@ -31,7 +31,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
#include <asm/debug.h>
struct resource pci_io_resource = {

3
arch/mips/tx4927/Kconfig
View File

@ -1,3 +0,0 @@
config TOSHIBA_FPCIB0
bool "FPCIB0 Backplane Support"
depends on TOSHIBA_RBTX4927

10
arch/mips/tx4927/common/Makefile
View File

@ -1,10 +0,0 @@
#
# Makefile for common code for Toshiba TX4927 based systems
#
obj-y += tx4927_prom.o tx4927_irq.o
obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
obj-$(CONFIG_KGDB) += tx4927_dbgio.o
EXTRA_CFLAGS += -Werror

43
arch/mips/tx4927/common/tx4927_dbgio.c
View File

@ -1,43 +0,0 @@
/*
* linux/arch/mips/tx4927/common/tx4927_dbgio.c
*
* kgdb interface for gdb
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
u8 getDebugChar(void)
{
extern u8 txx9_sio_kdbg_rd(void);
return (txx9_sio_kdbg_rd());
}
int putDebugChar(u8 byte)
{
extern int txx9_sio_kdbg_wr( u8 ch );
return (txx9_sio_kdbg_wr(byte));
}

5
arch/mips/tx4927/toshiba_rbtx4927/Makefile
View File

@ -1,5 +0,0 @@
obj-y += toshiba_rbtx4927_prom.o
obj-y += toshiba_rbtx4927_setup.o
obj-y += toshiba_rbtx4927_irq.o
EXTRA_CFLAGS += -Werror

8
arch/mips/tx4938/common/Makefile
View File

@ -1,8 +0,0 @@
#
# Makefile for common code for Toshiba TX4927 based systems
#
obj-y += prom.o irq.o
obj-$(CONFIG_KGDB) += dbgio.o
EXTRA_CFLAGS += -Werror

4
arch/mips/tx4938/Kconfig → arch/mips/txx9/Kconfig
View File

@ -1,3 +1,7 @@
config TOSHIBA_FPCIB0
bool "FPCIB0 Backplane Support"
depends on TOSHIBA_RBTX4927
if TOSHIBA_RBTX4938
comment "Multiplex Pin Select"

10
arch/mips/txx9/generic/Makefile Normal file
View File

@ -0,0 +1,10 @@
#
# Makefile for common code for TXx9 based systems
#
obj-$(CONFIG_TOSHIBA_RBTX4927) += mem_tx4927.o irq_tx4927.o
obj-$(CONFIG_TOSHIBA_RBTX4938) += mem_tx4938.o irq_tx4938.o
obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
obj-$(CONFIG_KGDB) += dbgio.o
EXTRA_CFLAGS += -Werror

0
arch/mips/tx4938/common/dbgio.c → arch/mips/txx9/generic/dbgio.c
View File

3
arch/mips/tx4927/common/tx4927_irq.c → arch/mips/txx9/generic/irq_tx4927.c
View File

@ -27,9 +27,8 @@
#include <linux/interrupt.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/tx4927/tx4927.h>
#ifdef CONFIG_TOSHIBA_RBTX4927
#include <asm/tx4927/toshiba_rbtx4927.h>
#include <asm/txx9/rbtx4927.h>
#endif
void __init tx4927_irq_init(void)

2
arch/mips/tx4938/common/irq.c → arch/mips/txx9/generic/irq_tx4938.c
View File

@ -15,7 +15,7 @@
#include <linux/interrupt.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/tx4938/rbtx4938.h>
#include <asm/txx9/rbtx4938.h>
void __init
tx4938_irq_init(void)

1
arch/mips/tx4927/common/tx4927_prom.c → arch/mips/txx9/generic/mem_tx4927.c
View File

@ -32,7 +32,6 @@
#include <linux/init.h>
#include <linux/types.h>
#include <linux/io.h>
#include <asm/tx4927/tx4927.h>
static unsigned int __init tx4927_process_sdccr(unsigned long addr)
{

0
arch/mips/tx4938/common/prom.c → arch/mips/txx9/generic/mem_tx4938.c
View File

2
arch/mips/tx4927/common/smsc_fdc37m81x.c → arch/mips/txx9/generic/smsc_fdc37m81x.c
View File

@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/tx4927/smsc_fdc37m81x.h>
#include <asm/txx9/smsc_fdc37m81x.h>
#define DEBUG

4
arch/mips/jmr3927/rbhma3100/Makefile → arch/mips/txx9/jmr3927/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for TOSHIBA JMR-TX3927 board
#
obj-y += init.o irq.o setup.o
obj-$(CONFIG_KGDB) += kgdb_io.o
obj-y += prom.o init.o irq.o setup.o
obj-$(CONFIG_KGDB) += kgdb_io.o
EXTRA_CFLAGS += -Werror

2
arch/mips/jmr3927/rbhma3100/init.c → arch/mips/txx9/jmr3927/init.c
View File

@ -29,7 +29,7 @@
*/
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
extern void __init prom_init_cmdline(void);

2
arch/mips/jmr3927/rbhma3100/irq.c → arch/mips/txx9/jmr3927/irq.c
View File

@ -39,7 +39,7 @@
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
#if JMR3927_IRQ_END > NR_IRQS
#error JMR3927_IRQ_END > NR_IRQS

2
arch/mips/jmr3927/rbhma3100/kgdb_io.c → arch/mips/txx9/jmr3927/kgdb_io.c
View File

@ -31,7 +31,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
#define TIMEOUT 0xffffff

26
arch/mips/jmr3927/common/prom.c → arch/mips/txx9/jmr3927/prom.c
View File

@ -40,6 +40,7 @@
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/txx9/tx3927.h>
char * __init prom_getcmdline(void)
{
@ -70,3 +71,28 @@ void __init prom_init_cmdline(void)
void __init prom_free_prom_memory(void)
{
}
#define TIMEOUT 0xffffff
void
prom_putchar(char c)
{
int i = 0;
do {
i++;
if (i>TIMEOUT)
break;
} while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
tx3927_sioptr(1)->tfifo = c;
return;
}
void
puts(const char *cp)
{
while (*cp)
prom_putchar(*cp++);
prom_putchar('\r');
prom_putchar('\n');
}

2
arch/mips/jmr3927/rbhma3100/setup.c → arch/mips/txx9/jmr3927/setup.c
View File

@ -44,7 +44,7 @@
#include <asm/txx9tmr.h>
#include <asm/txx9pio.h>
#include <asm/reboot.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/txx9/jmr3927.h>
#include <asm/mipsregs.h>
extern void puts(const char *cp);

3
arch/mips/txx9/rbtx4927/Makefile Normal file
View File

@ -0,0 +1,3 @@
obj-y += prom.o setup.o irq.o
EXTRA_CFLAGS += -Werror

4
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c → arch/mips/txx9/rbtx4927/irq.c
View File

@ -1,6 +1,4 @@
/*
* linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
*
* Toshiba RBTX4927 specific interrupt handlers
*
* Author: MontaVista Software, Inc.
@ -116,7 +114,7 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
#ifdef CONFIG_TOSHIBA_FPCIB0
#include <asm/i8259.h>
#endif
#include <asm/tx4927/toshiba_rbtx4927.h>
#include <asm/txx9/rbtx4927.h>
#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7

2
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c → arch/mips/txx9/rbtx4927/prom.c
View File

@ -34,7 +34,7 @@
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/tx4927/tx4927.h>
#include <asm/txx9/tx4927.h>
void __init prom_init_cmdline(void)
{

4
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c → arch/mips/txx9/rbtx4927/setup.c
View File

@ -59,9 +59,9 @@
#include <asm/time.h>
#include <asm/txx9tmr.h>
#ifdef CONFIG_TOSHIBA_FPCIB0
#include <asm/tx4927/smsc_fdc37m81x.h>
#include <asm/txx9/smsc_fdc37m81x.h>
#endif
#include <asm/tx4927/toshiba_rbtx4927.h>
#include <asm/txx9/rbtx4927.h>
#ifdef CONFIG_SERIAL_TXX9
#include <linux/serial_core.h>
#endif

4
arch/mips/tx4938/toshiba_rbtx4938/Makefile → arch/mips/txx9/rbtx4938/Makefile
View File

@ -1,7 +1,3 @@
#
# Makefile for common code for Toshiba TX4927 based systems
#
obj-y += prom.o setup.o irq.o spi_eeprom.o
EXTRA_CFLAGS += -Werror

4
arch/mips/tx4938/toshiba_rbtx4938/irq.c → arch/mips/txx9/rbtx4938/irq.c
View File

@ -1,6 +1,4 @@
/*
* linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
*
* Toshiba RBTX4938 specific interrupt handlers
* Copyright (C) 2000-2001 Toshiba Corporation
*
@ -68,7 +66,7 @@ IRQ Device
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/tx4938/rbtx4938.h>
#include <asm/txx9/rbtx4938.h>
static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);

4
arch/mips/tx4938/toshiba_rbtx4938/prom.c → arch/mips/txx9/rbtx4938/prom.c
View File

@ -1,6 +1,4 @@
/*
* linux/arch/mips/tx4938/toshiba_rbtx4938/prom.c
*
* rbtx4938 specific prom routines
* Copyright (C) 2000-2001 Toshiba Corporation
*
@ -19,7 +17,7 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/tx4938/tx4938.h>
#include <asm/txx9/tx4938.h>
void __init prom_init_cmdline(void)
{

6
arch/mips/tx4938/toshiba_rbtx4938/setup.c → arch/mips/txx9/rbtx4938/setup.c
View File

@ -1,6 +1,4 @@
/*
* linux/arch/mips/tx4938/toshiba_rbtx4938/setup.c
*
* Setup pointers to hardware-dependent routines.
* Copyright (C) 2000-2001 Toshiba Corporation
*
@ -28,12 +26,12 @@
#include <asm/txx9tmr.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
#include <asm/tx4938/rbtx4938.h>
#include <asm/txx9/rbtx4938.h>
#ifdef CONFIG_SERIAL_TXX9
#include <linux/serial_core.h>
#endif
#include <linux/spi/spi.h>
#include <asm/tx4938/spi.h>
#include <asm/txx9/spi.h>
#include <asm/txx9pio.h>
extern char * __init prom_getcmdline(void);

4
arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c → arch/mips/txx9/rbtx4938/spi_eeprom.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
* spi_eeprom.c
* Copyright (C) 2000-2001 Toshiba Corporation
*
* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@ -13,7 +13,7 @@
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
#include <asm/tx4938/spi.h>
#include <asm/txx9/spi.h>
#define AT250X0_PAGE_SIZE 8

8
include/asm-mips/jmr3927/jmr3927.h → include/asm-mips/txx9/jmr3927.h
View File

@ -7,10 +7,10 @@
*
* Copyright (C) 2000-2001 Toshiba Corporation
*/
#ifndef __ASM_TX3927_JMR3927_H
#define __ASM_TX3927_JMR3927_H
#ifndef __ASM_TXX9_JMR3927_H
#define __ASM_TXX9_JMR3927_H
#include <asm/jmr3927/tx3927.h>
#include <asm/txx9/tx3927.h>
#include <asm/addrspace.h>
#include <asm/system.h>
#include <asm/txx9irq.h>
@ -174,4 +174,4 @@
* INT[3:0]
*/
#endif /* __ASM_TX3927_JMR3927_H */
#endif /* __ASM_TXX9_JMR3927_H */

8
include/asm-mips/tx4927/toshiba_rbtx4927.h → include/asm-mips/txx9/rbtx4927.h
View File

@ -24,10 +24,10 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
#define __ASM_TX4927_TOSHIBA_RBTX4927_H
#ifndef __ASM_TXX9_RBTX4927_H
#define __ASM_TXX9_RBTX4927_H
#include <asm/tx4927/tx4927.h>
#include <asm/txx9/tx4927.h>
#ifdef CONFIG_PCI
#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
@ -46,4 +46,4 @@
int toshiba_rbtx4927_irq_nested(int sw_irq);
#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
#endif /* __ASM_TXX9_RBTX4927_H */

9
include/asm-mips/tx4938/rbtx4938.h → include/asm-mips/txx9/rbtx4938.h
View File

@ -1,5 +1,4 @@
/*
* linux/include/asm-mips/tx4938/rbtx4938.h
* Definitions for TX4937/TX4938
*
* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@ -9,12 +8,12 @@
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
#ifndef __ASM_TX_BOARDS_RBTX4938_H
#define __ASM_TX_BOARDS_RBTX4938_H
#ifndef __ASM_TXX9_RBTX4938_H
#define __ASM_TXX9_RBTX4938_H
#include <asm/addrspace.h>
#include <asm/tx4938/tx4938.h>
#include <asm/txx9irq.h>
#include <asm/txx9/tx4938.h>
/* CS */
#define RBTX4938_CE0 0x1c000000 /* 64M */
@ -165,4 +164,4 @@
#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
#endif /* __ASM_TX_BOARDS_RBTX4938_H */
#endif /* __ASM_TXX9_RBTX4938_H */

2
include/asm-mips/tx4927/smsc_fdc37m81x.h → include/asm-mips/txx9/smsc_fdc37m81x.h
View File

@ -1,6 +1,4 @@
/*
* linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
*
* Interface for smsc fdc48m81x Super IO chip
*
* Author: MontaVista Software, Inc. source@mvista.com

7
include/asm-mips/tx4938/spi.h → include/asm-mips/txx9/spi.h
View File

@ -1,5 +1,4 @@
/*
* linux/include/asm-mips/tx4938/spi.h
* Definitions for TX4937/TX4938 SPI
*
* Copyright (C) 2000-2001 Toshiba Corporation
@ -11,10 +10,10 @@
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
#define __ASM_TX_BOARDS_TX4938_SPI_H
#ifndef __ASM_TXX9_SPI_H
#define __ASM_TXX9_SPI_H
extern int spi_eeprom_register(int chipid);
extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
#endif /* __ASM_TXX9_SPI_H */

8
include/asm-mips/jmr3927/tx3927.h → include/asm-mips/txx9/tx3927.h
View File

@ -5,10 +5,10 @@
*
* Copyright (C) 2000 Toshiba Corporation
*/
#ifndef __ASM_TX3927_H
#define __ASM_TX3927_H
#ifndef __ASM_TXX9_TX3927_H
#define __ASM_TXX9_TX3927_H
#include <asm/jmr3927/txx927.h>
#include <asm/txx9/txx927.h>
#define TX3927_SDRAMC_REG 0xfffe8000
#define TX3927_ROMC_REG 0xfffe9000
@ -316,4 +316,4 @@ struct tx3927_ccfg_reg {
#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
#endif /* __ASM_TX3927_H */
#endif /* __ASM_TXX9_TX3927_H */

6
include/asm-mips/tx4927/tx4927.h → include/asm-mips/txx9/tx4927.h
View File

@ -24,8 +24,8 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_TX4927_TX4927_H
#define __ASM_TX4927_TX4927_H
#ifndef __ASM_TXX9_TX4927_H
#define __ASM_TXX9_TX4927_H
#include <asm/txx9irq.h>
@ -277,4 +277,4 @@ struct tx4927_pcic_reg {
#endif /* _LANGUAGE_ASSEMBLY */
#endif /* __ASM_TX4927_TX4927_H */
#endif /* __ASM_TXX9_TX4927_H */

5
include/asm-mips/tx4938/tx4938.h → include/asm-mips/txx9/tx4938.h
View File

@ -1,5 +1,4 @@
/*
* linux/include/asm-mips/tx4938/tx4938.h
* Definitions for TX4937/TX4938
* Copyright (C) 2000-2001 Toshiba Corporation
*
@ -10,8 +9,8 @@
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
#ifndef __ASM_TX_BOARDS_TX4938_H
#define __ASM_TX_BOARDS_TX4938_H
#ifndef __ASM_TXX9_TX4938_H
#define __ASM_TXX9_TX4938_H
#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)

6
include/asm-mips/jmr3927/txx927.h → include/asm-mips/txx9/txx927.h
View File

@ -7,8 +7,8 @@
*
* Copyright (C) 2000 Toshiba Corporation
*/
#ifndef __ASM_TXX927_H
#define __ASM_TXX927_H
#ifndef __ASM_TXX9_TXX927_H
#define __ASM_TXX9_TXX927_H
struct txx927_sio_reg {
volatile unsigned long lcr;
@ -118,4 +118,4 @@ struct txx927_sio_reg {
* PIO
*/
#endif /* __ASM_TXX927_H */
#endif /* __ASM_TXX9_TXX927_H */