Device tree changes for v3.5 merge window
Mostly documentation updates, but also includes an empty stub for non-CONFIG_OF builds. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPvoQ5AAoJEEFnBt12D9kBuwoP/idxZjNqsrr/z52EiSmBdvcQ Nyh1pJXH5sRKekpYhpiDNYNf5ylz3SC/Lmo3Wf8hb9awlSFnqzD9+0d3VZ91jaEO NVGsiPCLUMs4zQZgrJ3uJqr9XvaFI+3A+zScI/bduJVDMVRYCGhNjefiw0cBBfG9 OHD1TSzwU09Lnormq/gIpBJrVvm6Io0Vhz3lSiyU7I0SBB68lmDWxPIPiaqK00oV +ac0ew2fDTWm4uZR32MvdKX2wUalYwZthm7Okw7NgQ24bCGem2V0dEXT2alynNPY 2w05aAZ8F/9AxPxquRZesoLwoThFYBntG1WWsH0aFp+EbaLz88ZT3YdOO+b8lNF2 mGPgi1V2iyxwX21X43a001u3yPIuYt34X3QQosk9DnGNNnLcMuherPBtaJTGw8d0 cqSzXUTf4W+kk06O2gav8KEg93t4BHIgyah+Zd2buOrZ5xdFc+Gg1qsTFY5XKJ1A NvdBMtqR1/rfMQYbFsQugVdmdUKaJnsIvJAgdpLp4z9De7175liURwr+zOkMWj2z RLLbkvvokolUrlaitoZVjkXGn45gj8kLCV8frH/t511O8XBAS0RDL0NKeTWc0UGh HnCsuSn+0jPpBohKwGNvrlK5mZKDBeXor2dMxslWnDz50L04NlfAj0zuVTBHSL6O TmSYezKb9/auktRLfgRf =acqX -----END PGP SIGNATURE----- Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6 Pull device tree changes from Grant Likely: "Mostly documentation updates, but also includes an empty stub for non-CONFIG_OF builds." * tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6: dt/documentation: Fix value format description dt: add vendor prefix for EM Microelectronics ARM: DT: Add binding for GIC virtualization extentions (VGIC) of/irq: add empty irq_of_parse_and_map() for non-dt builds
This commit is contained in:
Linus Torvalds
commit
0708500d49
|
|
@ -11,7 +11,9 @@ have PPIs or SGIs.
|
|||
Main node required properties:
|
||||
|
||||
- compatible : should be one of:
|
||||
"arm,cortex-a15-gic"
|
||||
"arm,cortex-a9-gic"
|
||||
"arm,cortex-a7-gic"
|
||||
"arm,arm11mp-gic"
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
|
|
@ -39,8 +41,9 @@ Main node required properties:
|
|||
the GIC cpu interface register base and size.
|
||||
|
||||
Optional
|
||||
- interrupts : Interrupt source of the parent interrupt controller. Only
|
||||
present on secondary GICs.
|
||||
- interrupts : Interrupt source of the parent interrupt controller on
|
||||
secondary GICs, or VGIC maintainance interrupt on primary GIC (see
|
||||
below).
|
||||
|
||||
- cpu-offset : per-cpu offset within the distributor and cpu interface
|
||||
regions, used when the GIC doesn't have banked registers. The offset is
|
||||
|
|
@ -57,3 +60,31 @@ Example:
|
|||
<0xfff10100 0x100>;
|
||||
};
|
||||
|
||||
|
||||
* GIC virtualization extensions (VGIC)
|
||||
|
||||
For ARM cores that support the virtualization extensions, additional
|
||||
properties must be described (they only exist if the GIC is the
|
||||
primary interrupt controller).
|
||||
|
||||
Required properties:
|
||||
|
||||
- reg : Additional regions specifying the base physical address and
|
||||
size of the VGIC registers. The first additional region is the GIC
|
||||
virtual interface control register base and size. The 2nd additional
|
||||
region is the GIC virtual cpu interface register base and size.
|
||||
|
||||
- interrupts : VGIC maintainance interrupt.
|
||||
|
||||
Example:
|
||||
|
||||
interrupt-controller@2c001000 {
|
||||
compatible = "arm,cortex-a15-gic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
reg = <0x2c001000 0x1000>,
|
||||
<0x2c002000 0x1000>,
|
||||
<0x2c004000 0x2000>,
|
||||
<0x2c006000 0x2000>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@ chrp Common Hardware Reference Platform
|
|||
cortina Cortina Systems, Inc.
|
||||
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
|
||||
denx Denx Software Engineering
|
||||
emmicro EM Microelectronic
|
||||
epson Seiko Epson Corp.
|
||||
est ESTeem Wireless Modems
|
||||
fsl Freescale Semiconductor
|
||||
|
|
|
|||
|
|
@ -551,12 +551,13 @@ Here is an example of a simple device-tree. In this example, an "o"
|
|||
designates a node followed by the node unit name. Properties are
|
||||
presented with their name followed by their content. "content"
|
||||
represents an ASCII string (zero terminated) value, while <content>
|
||||
represents a 32-bit hexadecimal value. The various nodes in this
|
||||
example will be discussed in a later chapter. At this point, it is
|
||||
only meant to give you a idea of what a device-tree looks like. I have
|
||||
purposefully kept the "name" and "linux,phandle" properties which
|
||||
aren't necessary in order to give you a better idea of what the tree
|
||||
looks like in practice.
|
||||
represents a 32-bit value, specified in decimal or hexadecimal (the
|
||||
latter prefixed 0x). The various nodes in this example will be
|
||||
discussed in a later chapter. At this point, it is only meant to give
|
||||
you a idea of what a device-tree looks like. I have purposefully kept
|
||||
the "name" and "linux,phandle" properties which aren't necessary in
|
||||
order to give you a better idea of what the tree looks like in
|
||||
practice.
|
||||
|
||||
/ o device-tree
|
||||
|- name = "device-tree"
|
||||
|
|
@ -576,14 +577,14 @@ looks like in practice.
|
|||
| |- name = "PowerPC,970"
|
||||
| |- device_type = "cpu"
|
||||
| |- reg = <0>
|
||||
| |- clock-frequency = <5f5e1000>
|
||||
| |- clock-frequency = <0x5f5e1000>
|
||||
| |- 64-bit
|
||||
| |- linux,phandle = <2>
|
||||
|
|
||||
o memory@0
|
||||
| |- name = "memory"
|
||||
| |- device_type = "memory"
|
||||
| |- reg = <00000000 00000000 00000000 20000000>
|
||||
| |- reg = <0x00000000 0x00000000 0x00000000 0x20000000>
|
||||
| |- linux,phandle = <3>
|
||||
|
|
||||
o chosen
|
||||
|
|
@ -1010,8 +1011,8 @@ compatibility.
|
|||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
ranges = <00000000 e0000000 00100000>
|
||||
reg = <e0000000 00003000>;
|
||||
ranges = <0x00000000 0xe0000000 0x00100000>
|
||||
reg = <0xe0000000 0x00003000>;
|
||||
bus-frequency = <0>;
|
||||
}
|
||||
|
||||
|
|
@ -1085,16 +1086,16 @@ supported currently at the toplevel.
|
|||
* terminated string
|
||||
*/
|
||||
|
||||
property2 = <1234abcd>; /* define a property containing a
|
||||
property2 = <0x1234abcd>; /* define a property containing a
|
||||
* numerical 32-bit value (hexadecimal)
|
||||
*/
|
||||
|
||||
property3 = <12345678 12345678 deadbeef>;
|
||||
property3 = <0x12345678 0x12345678 0xdeadbeef>;
|
||||
/* define a property containing 3
|
||||
* numerical 32-bit values (cells) in
|
||||
* hexadecimal
|
||||
*/
|
||||
property4 = [0a 0b 0c 0d de ea ad be ef];
|
||||
property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef];
|
||||
/* define a property whose content is
|
||||
* an arbitrary array of bytes
|
||||
*/
|
||||
|
|
@ -1350,10 +1351,10 @@ Appendix A - Sample SOC node for MPC8540
|
|||
model = "TSEC";
|
||||
compatible = "gianfar", "simple-bus";
|
||||
reg = <0x24000 0x1000>;
|
||||
local-mac-address = [ 00 E0 0C 00 73 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ];
|
||||
interrupts = <0x29 2 0x30 2 0x34 2>;
|
||||
phy-handle = <&phy0>;
|
||||
sleep = <&pmc 00000080>;
|
||||
sleep = <&pmc 0x00000080>;
|
||||
ranges;
|
||||
|
||||
mdio@24520 {
|
||||
|
|
@ -1385,10 +1386,10 @@ Appendix A - Sample SOC node for MPC8540
|
|||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
local-mac-address = [ 00 E0 0C 00 73 01 ];
|
||||
interrupts = <13 2 14 2 18 2>;
|
||||
local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ];
|
||||
interrupts = <0x13 2 0x14 2 0x18 2>;
|
||||
phy-handle = <&phy1>;
|
||||
sleep = <&pmc 00000040>;
|
||||
sleep = <&pmc 0x00000040>;
|
||||
};
|
||||
|
||||
ethernet@26000 {
|
||||
|
|
@ -1396,17 +1397,17 @@ Appendix A - Sample SOC node for MPC8540
|
|||
model = "FEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
local-mac-address = [ 00 E0 0C 00 73 02 ];
|
||||
interrupts = <41 2>;
|
||||
local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ];
|
||||
interrupts = <0x41 2>;
|
||||
phy-handle = <&phy3>;
|
||||
sleep = <&pmc 00000020>;
|
||||
sleep = <&pmc 0x00000020>;
|
||||
};
|
||||
|
||||
serial@4500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8540-duart", "simple-bus";
|
||||
sleep = <&pmc 00000002>;
|
||||
sleep = <&pmc 0x00000002>;
|
||||
ranges;
|
||||
|
||||
serial@4500 {
|
||||
|
|
@ -1414,7 +1415,7 @@ Appendix A - Sample SOC node for MPC8540
|
|||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupts = <0x42 2>;
|
||||
};
|
||||
|
||||
serial@4600 {
|
||||
|
|
@ -1422,7 +1423,7 @@ Appendix A - Sample SOC node for MPC8540
|
|||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupts = <0x42 2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1436,11 +1437,11 @@ Appendix A - Sample SOC node for MPC8540
|
|||
};
|
||||
|
||||
i2c@3000 {
|
||||
interrupts = <43 2>;
|
||||
interrupts = <0x43 2>;
|
||||
reg = <0x3000 0x100>;
|
||||
compatible = "fsl-i2c";
|
||||
dfsrr;
|
||||
sleep = <&pmc 00000004>;
|
||||
sleep = <&pmc 0x00000004>;
|
||||
};
|
||||
|
||||
pmc: power@e0070 {
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ struct of_irq;
|
|||
#include <linux/of.h>
|
||||
|
||||
/*
|
||||
* irq_of_parse_and_map() is used ba all OF enabled platforms; but SPARC
|
||||
* irq_of_parse_and_map() is used by all OF enabled platforms; but SPARC
|
||||
* implements it differently. However, the prototype is the same for all,
|
||||
* so declare it here regardless of the CONFIG_OF_IRQ setting.
|
||||
*/
|
||||
|
|
@ -76,5 +76,13 @@ extern struct device_node *of_irq_find_parent(struct device_node *child);
|
|||
extern void of_irq_init(const struct of_device_id *matches);
|
||||
|
||||
#endif /* CONFIG_OF_IRQ */
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
#else /* !CONFIG_OF */
|
||||
static inline unsigned int irq_of_parse_and_map(struct device_node *dev,
|
||||
int index)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* !CONFIG_OF */
|
||||
|
||||
#endif /* __OF_IRQ_H */
|
||||
|
|
|
|||
Reference in New Issue