AgeCommit message (Expand)AuthorFilesLines
2018-03-11HACK: Work around IPA CCM bug in OsmoBSCneels/os3041Harald Welte1-1/+4
2018-03-11tmp dev: disable most testsNeels Hofmeyr1-73/+0
2018-03-11bsc: add test for OS#3041Neels Hofmeyr1-0/+29
2018-03-07MSC_Tests: Add testcase TC_cr_before_resetPhilipp Maier1-0/+66
2018-03-05bts/BTS_Tests.ttcn: update TC_rach_max_ta test caseVadim Yanitskiy1-1/+3
2018-03-03BSSGP_Emulation: Fix automatic BVC flow control ACK in SGSN roleHarald Welte2-7/+61
2018-03-03rlcmac: Fix name of RRBP_Nplus21_or_22_mod_2715648Harald Welte1-1/+1
2018-03-03Gb: avoid warnings about not-running timersHarald Welte2-4/+4
2018-03-03GSM_Types: Switch TLLI from uint32_t to OCT4Harald Welte5-26/+22
2018-03-02l1ctl: Add L1CTL_DATA_ABS_REQ for PACKET UPLINK ACKHarald Welte1-1/+44
2018-03-02gprs_gb: Update config filesHarald Welte1-3/+24
2018-03-02gprs_gb: Add more comments to codeHarald Welte1-0/+11
2018-03-02gb: Fix IEI of t_BSSGP_CAUSE()Harald Welte1-1/+1
2018-03-02hlr: Distinguish "invalid IMSI" from "unknown IMSI" casesHarald Welte1-2/+16
2018-03-02bts: f_validate_si_scheduling(): Print correct TC valueHarald Welte1-1/+1
2018-03-02f_rach_toffs: Print toffs256 value in verdict when failingHarald Welte2-2/+1
2018-03-02hlr: Add testcases for PURGE_MS procedureHarald Welte2-0/+114
2018-03-02hlr: Fix test of UL+ISD state machineHarald Welte1-0/+1
2018-03-02Makefile: use -j8, allow manual PARALLEL_MAKE valNeels Hofmeyr1-1/+1
2018-03-02msc: cosmetic: ts_CM1 template: parameterize esind (Early classmark Sending)Neels Hofmeyr1-2/+2
2018-03-02msc: add TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug (OS#2947)Neels Hofmeyr1-0/+15
2018-03-02msc: add TC_lu_imsi_auth_tmsi_encr_3_1_no_cmNeels Hofmeyr1-2/+19
2018-03-02msc: cosmetic: pass BSC_ConnHdlrPars to f_start_handler() as argumentNeels Hofmeyr1-3/+11
2018-03-02msc: cosmetic: f_perform_lu() / pars: move send_early_cm to BSC_ConnHdlrParsNeels Hofmeyr2-25/+27
2018-03-02msc: cosmetic: f_start_handler(): drop the id arg, use testcasename()Neels Hofmeyr1-41/+42
2018-03-01gsup: Make tr_GSUP_ISD_REQ more tolerantHarald Welte1-1/+1
2018-03-01hlr: Add TC_vty_msisdn_isdHarald Welte1-0/+41
2018-03-01hlr: Reduce code duplication by using templateHarald Welte1-3/+6
2018-03-01hlr: More test coverageHarald Welte2-14/+367
2018-03-01hlr: Add hlr sub-directory to master Makefile (for 'make compile' checks)Harald Welte2-2/+2
2018-03-01hlr: Make test run again using current OsmoHLR / TTCN-3 libraryHarald Welte2-3/+15
2018-03-01bts: ensure fake_trx BB CTRL IP is used from main componentHarald Welte1-2/+2
2018-03-01bts: Make IP address of fake_trx BB CTRL port configurableHarald Welte1-2/+3
2018-03-01MSC_ConnectionHandler: make sure altstep existsPhilipp Maier1-1/+0
2018-03-01BSC_Tests: use isvalue() instead of isbound()Philipp Maier1-1/+1
2018-03-01hlr: Integrate VTY and CTRL supportHarald Welte5-5/+64
2018-03-01hlr: Rename module + file from GSUP_Test to HLR_TestsHarald Welte2-2/+2
2018-03-01gtp: Add some CAUSE enum definitionsHarald Welte1-0/+12
2018-02-28bts: Update towards most recent "laforge/trx" branchHarald Welte3-13/+42
2018-02-28bts: Add PCU Interface testcasesHarald Welte5-0/+947
2018-02-28bts: Fix bugs in RACH Tests (timer not started, wrong CS/PS function)Harald Welte1-3/+3
2018-02-28BSC_Tests: try to avoid race conditionPhilipp Maier1-1/+27
2018-02-27bts: Add test for high-resulotion timing offset / TOA256Harald Welte1-0/+20
2018-02-27bts: Add TELNET/VTY module so we can interact with BTS VTYHarald Welte4-4/+19
2018-02-27bts: Instruct trxcon for TA=2 at every testcase startHarald Welte1-1/+4
2018-02-27Add new f_timer_safe_restart() function for warning-safe restartHarald Welte2-3/+10
2018-02-27bts: TC_rach_max_taHarald Welte1-0/+64
2018-02-27bts: Add TC_rach_content and TC_rach_countHarald Welte1-11/+86
2018-02-27L1CTL: Add message segmentation helper via getMsgLen()Harald Welte10-9/+56
2018-02-25WIP: bts: SI scheduling testsHarald Welte1-1/+459