summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNeels Hofmeyr <neels@hofmeyr.de>2019-01-23 12:44:09 +0100
committerNeels Hofmeyr <neels@hofmeyr.de>2019-01-23 12:44:42 +0100
commit2caf3497524c509994920a65ca450db34ad329a4 (patch)
treef9afe4022f3e0a3d20cfb22bb27630607d341641
parenta99ad26639072df8a508aca280100c0d6367627f (diff)
update expected results
-rw-r--r--bsc/expected-results.xml8
-rw-r--r--bts/expected-results.xml34
-rw-r--r--hlr/expected-results.xml2
-rw-r--r--msc/expected-results.xml113
-rw-r--r--sgsn/expected-results.xml9
5 files changed, 116 insertions, 50 deletions
diff --git a/bsc/expected-results.xml b/bsc/expected-results.xml
index fd26922..ccd2928 100644
--- a/bsc/expected-results.xml
+++ b/bsc/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='BSC_Tests' tests='95' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='BSC_Tests' tests='105' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
<testcase classname='BSC_Tests' name='TC_ctrl_msc_connection_status' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_ctrl_msc0_connection_status' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_ctrl' time='MASKED'/>
@@ -76,6 +76,10 @@
<testcase classname='BSC_Tests' name='TC_ho_out_fail_rr_ho_failure' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_ho_out_fail_no_ho_detect' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_ho_into_this_bsc' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_ho_in_fail_msc_clears' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_ho_in_fail_msc_clears_after_ho_detect' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_ho_in_fail_no_detect' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_ho_in_fail_no_detect2' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_bssap_rlsd_does_not_cause_bssmap_reset' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_bssmap_clear_does_not_cause_bssmap_reset' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_ms_rel_ind_does_not_cause_bssmap_reset' time='MASKED'/>
@@ -83,6 +87,8 @@
<testcase classname='BSC_Tests' name='TC_dyn_pdch_ipa_act_nack' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_dyn_pdch_osmo_act_deact' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_dyn_pdch_osmo_act_nack' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_chopped_ipa_ping' time='MASKED'/>
+ <testcase classname='BSC_Tests' name='TC_chopped_ipa_payload' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_early_conn_fail' time='MASKED'/>
<testcase classname='BSC_Tests' name='TC_late_conn_fail' time='MASKED'/>
<testcase classname='BSC_Tests_LCLS' name='TC_lcls_gcr_only' time='MASKED'/>
diff --git a/bts/expected-results.xml b/bts/expected-results.xml
index bad4d6f..2eadffd 100644
--- a/bts/expected-results.xml
+++ b/bts/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='85' failures='1' errors='0' skipped='1' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='88' failures='5' errors='0' skipped='1' inconc='0' time='MASKED'>
<testcase classname='BTS_Tests' name='TC_chan_act_stress' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_chan_act_react' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_chan_deact_not_active' time='MASKED'/>
@@ -13,10 +13,30 @@
<testcase classname='BTS_Tests' name='TC_rach_count' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_rach_max_ta' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_meas_res_sign_tchf' time='MASKED'/>
- <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh' time='MASKED'/>
- <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch4' time='MASKED'/>
- <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch8' time='MASKED'/>
- <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh_toa256' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh' time='MASKED'>
+ <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { lm := { tag := '0001'B, sub_chan := 0 } }, tn := 5 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 1 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_meas_res_sign_tchh testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch4' time='MASKED'>
+ <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { sdcch4 := { tag := '001'B, sub_chan := 0 } }, tn := 0 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 14 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 7, reserved1 := '00'B, rxlev_s_u := 7, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_meas_res_sign_sdcch4 testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch8' time='MASKED'>
+ <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { sdcch8 := { tag := '01'B, sub_chan := 0 } }, tn := 6 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 14 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 7, reserved1 := '00'B, rxlev_s_u := 7, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_meas_res_sign_sdcch8 testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh_toa256' time='MASKED'>
+ <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { lm := { tag := '0001'B, sub_chan := 0 } }, tn := 5 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 1 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 11, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := { toa256_mean := 512, toa256_min := 512, toa256_max := 512, toa256_std_dev := 0 } } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_meas_res_sign_tchh_toa256 testcase
+ </failure>
+ </testcase>
<testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_ctrl' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_conn_fail_crit' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_paging_imsi_80percent' time='MASKED'/>
@@ -88,9 +108,11 @@
<testcase classname='BTS_Tests' name='TC_lapdm_selftest' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame_dtxd' time='MASKED'>
- <failure type='fail-verdict'>Not enough fill frames received
+ <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Not enough fill frames received"
BTS_Tests.ttcn:MASKED BTS_Tests control part
BTS_Tests.ttcn:MASKED TC_tch_sign_l2_fill_frame_dtxd testcase
</failure>
</testcase>
+ <testcase classname='BTS_Tests' name='TC_chopped_ipa_ping' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_chopped_ipa_payload' time='MASKED'/>
</testsuite>
diff --git a/hlr/expected-results.xml b/hlr/expected-results.xml
index 8a1ed26..8329632 100644
--- a/hlr/expected-results.xml
+++ b/hlr/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='17' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='18' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
<testcase classname='HLR_Tests' name='TC_gsup_sai_err_invalid_imsi' time='MASKED'/>
<testcase classname='HLR_Tests' name='TC_gsup_sai' time='MASKED'/>
<testcase classname='HLR_Tests' name='TC_gsup_ul_unknown_imsi' time='MASKED'/>
diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index 650aefb..aeb2d24 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='55' failures='3' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='82' failures='4' errors='19' skipped='0' inconc='0' time='MASKED'>
<testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
@@ -28,12 +28,7 @@
<testcase classname='MSC_Tests' name='TC_cl3_no_payload' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_cl3_rnd_payload' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_establish_and_nothing' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='MASKED'>
- <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
- MSC_Tests.ttcn:MASKED MSC_Tests control part
- MSC_Tests.ttcn:MASKED TC_mo_setup_and_nothing testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_mo_crcx_ran_timeout' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_mo_crcx_ran_reject' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_mt_crcx_ran_reject' time='MASKED'>
@@ -43,12 +38,7 @@
</failure>
</testcase>
<testcase classname='MSC_Tests' name='TC_mo_setup_and_dtmf_dup' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='MASKED'>
- <failure type='fail-verdict'>Received unexpected BSSAP instead of CM SERV REJ
- MSC_Tests.ttcn:MASKED MSC_Tests control part
- MSC_Tests.ttcn:MASKED TC_gsup_cancel testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_1_13' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_13' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1' time='MASKED'/>
@@ -68,33 +58,86 @@
<testcase classname='MSC_Tests' name='TC_gsup_mo_smma' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_gsup_mt_sms_ack' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_gsup_mt_sms_err' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_gsup_mt_multi_part_sms' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_gsup_mt_multi_part_sms' time='MASKED'>
+ <failure type='fail-verdict'>Tguard timeout
+ MSC_Tests.ttcn:MASKED MSC_Tests control part
+ MSC_Tests.ttcn:MASKED TC_gsup_mt_multi_part_sms testcase
+ </failure>
+ </testcase>
<testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_single_request' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_notification' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_during_mt_call' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_during_mt_call' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_mo_release' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_lu_and_ss_session_timeout' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_lu_and_ss_session_timeout' time='MASKED'>
+ <error type='DTE'>Dynamic test case error: testcase.stop</error>
+ </testcase>
<testcase classname='MSC_Tests' name='TC_cipher_complete_with_invalid_cipher' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_sgsap_reset' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_lu' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_lu_imsi_reject' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_nothing' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_eps' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_noneps' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_paging_rej' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_paging_subscr_rej' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_paging_ue_unr' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_nothing' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_lu' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_mo_sms' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_nothing' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_reject' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_unexp_ud' time='MASKED'>
+ <failure type='fail-verdict'>Error in CTRL GET "fsm.SGs-UE.id.imsi:262420000002145.state": "Error"
+ MSC_Tests.ttcn:MASKED MSC_Tests control part
+ MSC_Tests.ttcn:MASKED TC_sgsap_unexp_ud testcase
+ </failure>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_unsol_ud' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_bssap_lu_sgsap_lu_and_mt_call' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
+ <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_mt_call' time='MASKED'>
+ <error type='DTE'></error>
+ </testcase>
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_reset' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_lu' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_lu_imsi_reject' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_nothing' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_eps' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_noneps' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_paging_rej' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_paging_subscr_rej' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_paging_ue_unr' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_nothing' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_lu' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_unexp_ud' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_unsol_ud' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_mo_sms' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_nothing' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_reject' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_bssap_lu_sgsap_lu_and_mt_call' time='MASKED'/>
- <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_mt_call' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'>
+ <failure type='fail-verdict'>Tguard timeout
+ MSC_Tests.ttcn:MASKED MSC_Tests control part
+ MSC_Tests.ttcn:MASKED TC_mo_cc_bssmap_clear testcase
+ </failure>
+ </testcase>
</testsuite>
diff --git a/sgsn/expected-results.xml b/sgsn/expected-results.xml
index 3d9117f..b53a6f3 100644
--- a/sgsn/expected-results.xml
+++ b/sgsn/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='43' failures='4' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='43' failures='3' errors='0' skipped='0' inconc='0' time='MASKED'>
<testcase classname='SGSN_Tests' name='TC_attach' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_mnc3' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_umts_aka_umts_res' time='MASKED'/>
@@ -25,12 +25,7 @@
<testcase classname='SGSN_Tests' name='TC_attach_no_imei_response' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_no_imsi_response' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_closed_add_vty' time='MASKED'/>
- <testcase classname='SGSN_Tests' name='TC_attach_check_subscriber_list' time='MASKED'>
- <failure type='fail-verdict'>Non-matching VTY response: ""
- SGSN_Tests.ttcn:MASKED SGSN_Tests control part
- SGSN_Tests.ttcn:MASKED TC_attach_check_subscriber_list testcase
- </failure>
- </testcase>
+ <testcase classname='SGSN_Tests' name='TC_attach_check_subscriber_list' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_detach_check_subscriber_list' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_attach_check_complete_resend' time='MASKED'/>
<testcase classname='SGSN_Tests' name='TC_hlr_location_cancel_request_update' time='MASKED'/>