summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNeels Hofmeyr <neels@hofmeyr.de>2018-05-08 17:32:06 +0200
committerHarald Welte <laforge@gnumonks.org>2018-05-09 12:50:17 +0000
commit29402a1efd47ec09eb59ecfbc35408f1790aa735 (patch)
treedb8ec49a64d03b3b2e0a9052f4de77f875dc91db
parent0ea2d5efb45db8fde5aae12d2551b7db1d9ae71d (diff)
add bts/expected-results.xml
-rw-r--r--bts/expected-results.xml91
1 files changed, 91 insertions, 0 deletions
diff --git a/bts/expected-results.xml b/bts/expected-results.xml
new file mode 100644
index 0000000..6ac0686
--- /dev/null
+++ b/bts/expected-results.xml
@@ -0,0 +1,91 @@
+<?xml version="1.0"?>
+<testsuite name='Titan' tests='64' failures='4' errors='1' skipped='1' inconc='0' time='MASKED'>
+ <testcase classname='BTS_Tests' name='TC_chan_act_stress' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_chan_act_react' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_chan_deact_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_chan_act_wrong_nr' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_deact_sacch' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_sacch_filling' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_sacch_info_mod' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_sacch_multi' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_sacch_multi_chg' time='MASKED'>
+ <error type='DTE'>Dynamic test case error: Error message was received from MC: The connect operation refers to test component with component reference 116, which has already terminated.</error>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_rach_content' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_rach_count' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_rach_max_ta' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchf' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch4' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch8' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh_toa256' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_conn_fail_crit' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_paging_imsi_80percent' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_paging_tmsi_80percent' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_paging_imsi_200percent' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_paging_tmsi_200percent' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_rsl_protocol_error' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_rsl_mand_ie_error' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_rsl_ie_content_error' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_default' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_1' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_2bis' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_2ter' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_2ter_2bis' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_2quater' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_13' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_si_sched_13_2bis_2ter_2quater' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_ipa_dlcx_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_ipa_crcx_twice_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_ipa_crcx_mdcx_dlcx_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_ipa_crcx_mdcx_mdcx_dlcx_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_ipa_crcx_sdcch_not_active' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_act_req' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_act_req_wrong_ts' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_act_req_wrong_bts' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_act_req_wrong_trx' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_deact_req' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_deact_req_wrong_ts' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_ver_si13' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_bts' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_trx' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_ts' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_ts_inactive' time='MASKED'>
+ <skipped>no verdict</skipped>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_pdtch' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_ptcch' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_agch' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_data_req_imm_ass_pch' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_rach_content' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_pcu_paging_from_rsl' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_act_deact' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_unsol_deact' time='MASKED'>
+ <failure type='fail-verdict'>RSL for unknown Dchan
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_dyn_osmo_pdch_unsol_deact testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_double_act' time='MASKED'>
+ <failure type='fail-verdict'>"Timeout expecting RSL CHAN ACT"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_dyn_osmo_pdch_double_act testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_tchf_act' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_tchh_act' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_deact' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_tchf_act' time='MASKED'/>
+ <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_tchf_act_pdch_act_nack' time='MASKED'>
+ <failure type='fail-verdict'>Tguard timeout
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_dyn_ipa_pdch_tchf_act_pdch_act_nack testcase
+ </failure>
+ </testcase>
+ <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_tchf_act_nack' time='MASKED'>
+ <failure type='fail-verdict'>"Timeout expecting RSL CHAN ACT"
+ BTS_Tests.ttcn:MASKED BTS_Tests control part
+ BTS_Tests.ttcn:MASKED TC_dyn_ipa_pdch_act_tchf_act_nack testcase
+ </failure>
+ </testcase>
+</testsuite>