From c1f7c42a33a1125f8b39f53a1b6e1bae38376857 Mon Sep 17 00:00:00 2001 From: Thomas Tsou Date: Fri, 11 Oct 2013 13:49:55 -0400 Subject: Transceiver52M: Setup dual sample rate transceiver This patch applies oversampling, when selected with 4 sps, to the downlink only, while running the receiver with minimal sampling at 1 sps. These split sample rates allow us to run a highly accurate downlink signal with minimal distortion, while keeping receive path channel filtering on the FPGA. Without this patch, we oversample the receive path and require a steep receive filter to get similar adjacent channel suppression as the FPGA halfband / CIC filter combination, which comes with a high computational cost. Signed-off-by: Thomas Tsou --- Transceiver52M/Transceiver.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Transceiver52M/Transceiver.h') diff --git a/Transceiver52M/Transceiver.h b/Transceiver52M/Transceiver.h index 3e4f784..d243214 100644 --- a/Transceiver52M/Transceiver.h +++ b/Transceiver52M/Transceiver.h @@ -125,7 +125,8 @@ private: /** send messages over the clock socket */ void writeClockInterface(void); - int mSPS; ///< number of samples per GSM symbol + int mSPSTx; ///< number of samples per Tx symbol + int mSPSRx; ///< number of samples per Rx symbol bool mOn; ///< flag to indicate that transceiver is powered on ChannelCombination mChanType[8]; ///< channel types for all timeslots -- cgit v1.2.3