I/OAT: Add DCA services
Add code to connect to the DCA driver and provide cpu tags for use by
drivers that would like to use Direct Cache Access hints.
[Adrian Bunk] Several Kconfig cleanup items
[Andrew Morten, Chris Leech] Fix for using cpu_physical_id() even when
built for uni-processor
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Shannon Nelson
Linus Torvalds
parent
7589670f37
commit
2ed6dc34f9
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@ -3,9 +3,5 @@
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#
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config DCA
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tristate "DCA support for clients and providers"
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default m
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help
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This is a server to help modules that want to use Direct Cache
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Access to find DCA providers that will supply correct CPU tags.
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tristate
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@ -2,42 +2,52 @@
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# DMA engine configuration
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#
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menu "DMA Engine support"
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depends on HAS_DMA
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menuconfig DMADEVICES
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bool "DMA Offload Engine support"
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depends on (PCI && X86) || ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
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help
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Intel(R) offload engines enable offloading memory copies in the
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network stack and RAID operations in the MD driver.
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config DMA_ENGINE
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bool "Support for DMA engines"
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---help---
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DMA engines offload bulk memory operations from the CPU to dedicated
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hardware, allowing the operations to happen asynchronously.
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comment "DMA Clients"
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config NET_DMA
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bool "Network: TCP receive copy offload"
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depends on DMA_ENGINE && NET
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default y
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---help---
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This enables the use of DMA engines in the network stack to
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offload receive copy-to-user operations, freeing CPU cycles.
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Since this is the main user of the DMA engine, it should be enabled;
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say Y here.
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if DMADEVICES
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comment "DMA Devices"
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config INTEL_IOATDMA
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tristate "Intel I/OAT DMA support"
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depends on DMA_ENGINE && PCI
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default m
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---help---
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Enable support for the Intel(R) I/OAT DMA engine.
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depends on PCI && X86
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select DMA_ENGINE
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select DCA
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help
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Enable support for the Intel(R) I/OAT DMA engine present
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in recent Intel Xeon chipsets.
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Say Y here if you have such a chipset.
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If unsure, say N.
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config INTEL_IOP_ADMA
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tristate "Intel IOP ADMA support"
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depends on DMA_ENGINE && (ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX)
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tristate "Intel IOP ADMA support"
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depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
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select ASYNC_CORE
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default m
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---help---
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Enable support for the Intel(R) IOP Series RAID engines.
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select DMA_ENGINE
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help
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Enable support for the Intel(R) IOP Series RAID engines.
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endmenu
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config DMA_ENGINE
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bool
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comment "DMA Clients"
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depends on DMA_ENGINE
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config NET_DMA
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bool "Network: TCP receive copy offload"
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depends on DMA_ENGINE && NET
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default y
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help
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This enables the use of DMA engines in the network stack to
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offload receive copy-to-user operations, freeing CPU cycles.
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Since this is the main user of the DMA engine, it should be enabled;
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say Y here.
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endif
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@ -1,5 +1,5 @@
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obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
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obj-$(CONFIG_NET_DMA) += iovlock.o
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obj-$(CONFIG_INTEL_IOATDMA) += ioatdma.o
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ioatdma-objs := ioat.o ioat_dma.o
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ioatdma-objs := ioat.o ioat_dma.o ioat_dca.o
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obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
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@ -1,6 +1,6 @@
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/*
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2004 - 2007 Intel Corporation.
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* Copyright(c) 2007 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -29,6 +29,7 @@
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/dca.h>
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#include "ioatdma.h"
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#include "ioatdma_registers.h"
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#include "ioatdma_hw.h"
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@ -49,6 +50,7 @@ struct ioat_device {
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struct pci_dev *pdev;
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void __iomem *iobase;
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struct ioatdma_device *dma;
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struct dca_provider *dca;
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};
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static int __devinit ioat_probe(struct pci_dev *pdev,
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@ -57,6 +59,10 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
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static void __devexit ioat_remove(struct pci_dev *pdev);
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#endif
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static int ioat_dca_enabled = 1;
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module_param(ioat_dca_enabled, int, 0644);
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MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
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static int ioat_setup_functionality(struct pci_dev *pdev, void __iomem *iobase)
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{
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struct ioat_device *device = pci_get_drvdata(pdev);
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@ -67,6 +73,8 @@ static int ioat_setup_functionality(struct pci_dev *pdev, void __iomem *iobase)
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switch (version) {
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case IOAT_VER_1_2:
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device->dma = ioat_dma_probe(pdev, iobase);
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if (ioat_dca_enabled)
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device->dca = ioat_dca_init(pdev, iobase);
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break;
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default:
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err = -ENODEV;
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@ -83,6 +91,13 @@ static void ioat_shutdown_functionality(struct pci_dev *pdev)
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ioat_dma_remove(device->dma);
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device->dma = NULL;
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}
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if (device->dca) {
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unregister_dca_provider(device->dca);
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free_dca_provider(device->dca);
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device->dca = NULL;
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}
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}
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static struct pci_driver ioat_pci_drv = {
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@ -0,0 +1,263 @@
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/*
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2007 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/dca.h>
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/* either a kernel change is needed, or we need something like this in kernel */
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#ifndef CONFIG_SMP
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#include <asm/smp.h>
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#undef cpu_physical_id
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#define cpu_physical_id(cpu) (cpuid_ebx(1) >> 24)
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#endif
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#include "ioatdma.h"
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#include "ioatdma_registers.h"
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/*
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* Bit 16 of a tag map entry is the "valid" bit, if it is set then bits 0:15
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* contain the bit number of the APIC ID to map into the DCA tag. If the valid
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* bit is not set, then the value must be 0 or 1 and defines the bit in the tag.
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*/
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#define DCA_TAG_MAP_VALID 0x80
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/*
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* "Legacy" DCA systems do not implement the DCA register set in the
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* I/OAT device. Software needs direct support for their tag mappings.
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*/
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#define APICID_BIT(x) (DCA_TAG_MAP_VALID | (x))
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#define IOAT_TAG_MAP_LEN 8
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static u8 ioat_tag_map_BNB[IOAT_TAG_MAP_LEN] = {
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1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
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static u8 ioat_tag_map_SCNB[IOAT_TAG_MAP_LEN] = {
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1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
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static u8 ioat_tag_map_CNB[IOAT_TAG_MAP_LEN] = {
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1, APICID_BIT(1), APICID_BIT(3), APICID_BIT(4), APICID_BIT(2), };
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static u8 ioat_tag_map_UNISYS[IOAT_TAG_MAP_LEN] = { 0 };
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/* pack PCI B/D/F into a u16 */
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static inline u16 dcaid_from_pcidev(struct pci_dev *pci)
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{
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return (pci->bus->number << 8) | pci->devfn;
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}
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static int dca_enabled_in_bios(void)
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{
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/* CPUID level 9 returns DCA configuration */
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/* Bit 0 indicates DCA enabled by the BIOS */
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unsigned long cpuid_level_9;
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int res;
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cpuid_level_9 = cpuid_eax(9);
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res = test_bit(0, &cpuid_level_9);
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if (!res)
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printk(KERN_ERR "ioat dma: DCA is disabled in BIOS\n");
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return res;
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}
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static int system_has_dca_enabled(void)
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{
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if (boot_cpu_has(X86_FEATURE_DCA))
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return dca_enabled_in_bios();
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printk(KERN_ERR "ioat dma: boot cpu doesn't have X86_FEATURE_DCA\n");
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return 0;
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}
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struct ioat_dca_slot {
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struct pci_dev *pdev; /* requester device */
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u16 rid; /* requester id, as used by IOAT */
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};
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#define IOAT_DCA_MAX_REQ 6
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struct ioat_dca_priv {
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void __iomem *iobase;
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void *dca_base;
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int max_requesters;
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int requester_count;
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u8 tag_map[IOAT_TAG_MAP_LEN];
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struct ioat_dca_slot req_slots[0];
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};
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/* 5000 series chipset DCA Port Requester ID Table Entry Format
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* [15:8] PCI-Express Bus Number
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* [7:3] PCI-Express Device Number
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* [2:0] PCI-Express Function Number
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*
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* 5000 series chipset DCA control register format
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* [7:1] Reserved (0)
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* [0] Ignore Function Number
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*/
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static int ioat_dca_add_requester(struct dca_provider *dca, struct device *dev)
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{
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struct ioat_dca_priv *ioatdca = dca_priv(dca);
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struct pci_dev *pdev;
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int i;
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u16 id;
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/* This implementation only supports PCI-Express */
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if (dev->bus != &pci_bus_type)
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return -ENODEV;
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pdev = to_pci_dev(dev);
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id = dcaid_from_pcidev(pdev);
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if (ioatdca->requester_count == ioatdca->max_requesters)
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return -ENODEV;
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for (i = 0; i < ioatdca->max_requesters; i++) {
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if (ioatdca->req_slots[i].pdev == NULL) {
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/* found an empty slot */
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ioatdca->requester_count++;
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ioatdca->req_slots[i].pdev = pdev;
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ioatdca->req_slots[i].rid = id;
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writew(id, ioatdca->dca_base + (i * 4));
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/* make sure the ignore function bit is off */
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writeb(0, ioatdca->dca_base + (i * 4) + 2);
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return i;
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}
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}
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/* Error, ioatdma->requester_count is out of whack */
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return -EFAULT;
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}
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static int ioat_dca_remove_requester(struct dca_provider *dca,
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struct device *dev)
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{
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struct ioat_dca_priv *ioatdca = dca_priv(dca);
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struct pci_dev *pdev;
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int i;
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/* This implementation only supports PCI-Express */
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if (dev->bus != &pci_bus_type)
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return -ENODEV;
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pdev = to_pci_dev(dev);
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for (i = 0; i < ioatdca->max_requesters; i++) {
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if (ioatdca->req_slots[i].pdev == pdev) {
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writew(0, ioatdca->dca_base + (i * 4));
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ioatdca->req_slots[i].pdev = NULL;
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ioatdca->req_slots[i].rid = 0;
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ioatdca->requester_count--;
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return i;
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}
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}
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return -ENODEV;
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}
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static u8 ioat_dca_get_tag(struct dca_provider *dca, int cpu)
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{
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struct ioat_dca_priv *ioatdca = dca_priv(dca);
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int i, apic_id, bit, value;
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u8 entry, tag;
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tag = 0;
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apic_id = cpu_physical_id(cpu);
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for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
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entry = ioatdca->tag_map[i];
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if (entry & DCA_TAG_MAP_VALID) {
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bit = entry & ~DCA_TAG_MAP_VALID;
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value = (apic_id & (1 << bit)) ? 1 : 0;
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} else {
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value = entry ? 1 : 0;
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}
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tag |= (value << i);
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}
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return tag;
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}
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static struct dca_ops ioat_dca_ops = {
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.add_requester = ioat_dca_add_requester,
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.remove_requester = ioat_dca_remove_requester,
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.get_tag = ioat_dca_get_tag,
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};
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struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
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{
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struct dca_provider *dca;
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struct ioat_dca_priv *ioatdca;
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u8 *tag_map = NULL;
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int i;
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int err;
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if (!system_has_dca_enabled())
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return NULL;
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/* I/OAT v1 systems must have a known tag_map to support DCA */
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switch (pdev->vendor) {
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case PCI_VENDOR_ID_INTEL:
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_IOAT:
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tag_map = ioat_tag_map_BNB;
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break;
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case PCI_DEVICE_ID_INTEL_IOAT_CNB:
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tag_map = ioat_tag_map_CNB;
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break;
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case PCI_DEVICE_ID_INTEL_IOAT_SCNB:
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tag_map = ioat_tag_map_SCNB;
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break;
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}
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break;
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case PCI_VENDOR_ID_UNISYS:
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switch (pdev->device) {
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case PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR:
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tag_map = ioat_tag_map_UNISYS;
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break;
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}
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break;
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}
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if (tag_map == NULL)
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return NULL;
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dca = alloc_dca_provider(&ioat_dca_ops,
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sizeof(*ioatdca) +
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(sizeof(struct ioat_dca_slot) * IOAT_DCA_MAX_REQ));
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if (!dca)
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return NULL;
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ioatdca = dca_priv(dca);
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ioatdca->max_requesters = IOAT_DCA_MAX_REQ;
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ioatdca->dca_base = iobase + 0x54;
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/* copy over the APIC ID to DCA tag mapping */
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for (i = 0; i < IOAT_TAG_MAP_LEN; i++)
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ioatdca->tag_map[i] = tag_map[i];
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err = register_dca_provider(dca, &pdev->dev);
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if (err) {
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free_dca_provider(dca);
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return NULL;
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}
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return dca;
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}
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@ -132,9 +132,12 @@ struct ioat_desc_sw {
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struct ioatdma_device *ioat_dma_probe(struct pci_dev *pdev,
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void __iomem *iobase);
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void ioat_dma_remove(struct ioatdma_device *device);
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struct dca_provider *ioat_dca_init(struct pci_dev *pdev,
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void __iomem *iobase);
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#else
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#define ioat_dma_probe(pdev, iobase) NULL
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#define ioat_dma_remove(device) do { } while (0)
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#define ioat_dca_init(pdev, iobase) NULL
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#endif
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#endif /* IOATDMA_H */
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@ -92,6 +92,7 @@
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#define X86_FEATURE_CID (4*32+10) /* Context ID */
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#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
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#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
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#define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
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/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
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#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
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Reference in New Issue